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99 lines
3.1 KiB
99 lines
3.1 KiB
2 years ago
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void gpio_usb_init(void) {
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// A11,A12: USB
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set_gpio_alternate(GPIOA, 11, GPIO_AF10_OTG_FS);
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set_gpio_alternate(GPIOA, 12, GPIO_AF10_OTG_FS);
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GPIOA->OSPEEDR = GPIO_OSPEEDER_OSPEEDR11 | GPIO_OSPEEDER_OSPEEDR12;
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}
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void gpio_spi_init(void) {
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// A4-A7: SPI
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set_gpio_alternate(GPIOA, 4, GPIO_AF5_SPI1);
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set_gpio_alternate(GPIOA, 5, GPIO_AF5_SPI1);
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set_gpio_alternate(GPIOA, 6, GPIO_AF5_SPI1);
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set_gpio_alternate(GPIOA, 7, GPIO_AF5_SPI1);
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register_set_bits(&(GPIOA->OSPEEDR), GPIO_OSPEEDER_OSPEEDR4 | GPIO_OSPEEDER_OSPEEDR5 | GPIO_OSPEEDER_OSPEEDR6 | GPIO_OSPEEDER_OSPEEDR7);
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}
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void gpio_usart2_init(void) {
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// A2,A3: USART 2 for debugging
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set_gpio_alternate(GPIOA, 2, GPIO_AF7_USART2);
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set_gpio_alternate(GPIOA, 3, GPIO_AF7_USART2);
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}
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// Common GPIO initialization
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void common_init_gpio(void) {
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// TODO: Is this block actually doing something???
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// pull low to hold ESP in reset??
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// enable OTG out tied to ground
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GPIOA->ODR = 0;
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GPIOB->ODR = 0;
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GPIOA->PUPDR = 0;
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GPIOB->AFR[0] = 0;
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GPIOB->AFR[1] = 0;
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// C2: Voltage sense line
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set_gpio_mode(GPIOC, 2, MODE_ANALOG);
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gpio_usb_init();
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// A9,A10: USART 1 for talking to the GPS
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set_gpio_alternate(GPIOA, 9, GPIO_AF7_USART1);
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set_gpio_alternate(GPIOA, 10, GPIO_AF7_USART1);
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// B8,B9: CAN 1
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#ifdef STM32F4
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set_gpio_alternate(GPIOB, 8, GPIO_AF8_CAN1);
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set_gpio_alternate(GPIOB, 9, GPIO_AF8_CAN1);
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#else
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set_gpio_alternate(GPIOB, 8, GPIO_AF9_CAN1);
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set_gpio_alternate(GPIOB, 9, GPIO_AF9_CAN1);
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#endif
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}
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void flasher_peripherals_init(void) {
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RCC->AHB1ENR |= RCC_AHB1ENR_DMA2EN;
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RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
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RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN;
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RCC->APB1ENR |= RCC_APB1ENR_USART2EN;
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}
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// Peripheral initialization
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void peripherals_init(void) {
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// enable GPIOB, UART2, CAN, USB clock
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN;
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN;
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN;
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RCC->AHB1ENR |= RCC_AHB1ENR_DMA2EN;
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RCC->APB1ENR |= RCC_APB1ENR_USART2EN;
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RCC->APB1ENR |= RCC_APB1ENR_USART3EN;
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#ifdef PANDA
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RCC->APB1ENR |= RCC_APB1ENR_UART5EN;
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#endif
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RCC->APB1ENR |= RCC_APB1ENR_CAN1EN;
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RCC->APB1ENR |= RCC_APB1ENR_CAN2EN;
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#ifdef CAN3
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RCC->APB1ENR |= RCC_APB1ENR_CAN3EN;
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#endif
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RCC->APB1ENR |= RCC_APB1ENR_DACEN;
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RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; // main counter
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RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; // pedal and fan PWM
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RCC->APB1ENR |= RCC_APB1ENR_TIM4EN; // IR PWM
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RCC->APB1ENR |= RCC_APB1ENR_TIM5EN; // k-line init
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RCC->APB1ENR |= RCC_APB1ENR_TIM6EN; // interrupt timer
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RCC->APB1ENR |= RCC_APB1ENR_TIM12EN; // gmlan_alt
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RCC->APB1ENR |= RCC_APB1ENR_PWREN; // for RTC config
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RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
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RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN;
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RCC->APB2ENR |= RCC_APB2ENR_TIM1EN; // clock source timer
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RCC->APB2ENR |= RCC_APB2ENR_ADC1EN;
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RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
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RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN;
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RCC->APB2ENR |= RCC_APB2ENR_TIM9EN; // slow loop
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}
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void enable_interrupt_timer(void) {
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register_set_bits(&(RCC->APB1ENR), RCC_APB1ENR_TIM6EN); // Enable interrupt timer peripheral
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}
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