parent
ab3492bb90
commit
4653a9aef0
127 changed files with 4802 additions and 32232 deletions
@ -0,0 +1,3 @@ |
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[submodule "panda"] |
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path = panda |
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url = git@github.com:commaai/panda.git |
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@ -1,43 +0,0 @@ |
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# :set noet
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PROJ_NAME = comma
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CFLAGS = -g -O0 -Wall
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CFLAGS += -mlittle-endian -mthumb -mcpu=cortex-m3
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CFLAGS += -msoft-float -DSTM32F2 -DSTM32F205xx
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CFLAGS += -I inc -nostdlib
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CFLAGS += -Tstm32_flash.ld
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CC = arm-none-eabi-gcc
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OBJCOPY = arm-none-eabi-objcopy
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OBJDUMP = arm-none-eabi-objdump
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MACHINE = $(shell uname -m)
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all: obj/$(PROJ_NAME).bin |
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#$(OBJDUMP) -d obj/$(PROJ_NAME).elf
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./tools/enter_download_mode.py
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./tools/dfu-util-$(MACHINE) -a 0 -s 0x08000000 -D $<
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./tools/dfu-util-$(MACHINE) --reset-stm32 -a 0 -s 0x08000000
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ifneq ($(wildcard ../.git/HEAD),)
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obj/gitversion.h: ../.git/HEAD ../.git/index |
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echo "const uint8_t gitversion[] = \"$(shell git rev-parse HEAD)\";" > $@
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else |
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obj/gitversion.h: |
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echo "const uint8_t gitversion[] = \"RELEASE\";" > $@
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endif |
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obj/main.o: main.c *.h obj/gitversion.h |
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$(CC) $(CFLAGS) -o $@ -c $<
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obj/startup_stm32f205xx.o: startup_stm32f205xx.s |
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mkdir -p obj
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$(CC) $(CFLAGS) -o $@ -c $<
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obj/$(PROJ_NAME).bin: obj/startup_stm32f205xx.o obj/main.o |
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$(CC) $(CFLAGS) -o obj/$(PROJ_NAME).elf $^
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$(OBJCOPY) -v -O binary obj/$(PROJ_NAME).elf $@
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clean: |
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rm -f obj/*
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@ -1,38 +0,0 @@ |
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// ACCEL1 = ADC10
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// ACCEL2 = ADC11
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// VOLT_S = ADC12
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// CURR_S = ADC13
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#define ADCCHAN_ACCEL0 10 |
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#define ADCCHAN_ACCEL1 11 |
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#define ADCCHAN_VOLTAGE 12 |
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#define ADCCHAN_CURRENT 13 |
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void adc_init() { |
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// global setup
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ADC->CCR = ADC_CCR_TSVREFE | ADC_CCR_VBATE; |
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//ADC1->CR2 = ADC_CR2_ADON | ADC_CR2_EOCS | ADC_CR2_DDS;
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ADC1->CR2 = ADC_CR2_ADON; |
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// long
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ADC1->SMPR1 = ADC_SMPR1_SMP10 | ADC_SMPR1_SMP11 | ADC_SMPR1_SMP12 | ADC_SMPR1_SMP13; |
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} |
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uint32_t adc_get(int channel) { |
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// includes length
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//ADC1->SQR1 = 0;
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// select channel
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ADC1->JSQR = channel << 15; |
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//ADC1->CR1 = ADC_CR1_DISCNUM_0;
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//ADC1->CR1 = ADC_CR1_EOCIE;
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ADC1->SR &= ~(ADC_SR_JEOC); |
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ADC1->CR2 |= ADC_CR2_JSWSTART; |
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while (!(ADC1->SR & ADC_SR_JEOC)); |
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return ADC1->JDR1; |
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} |
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@ -1,84 +0,0 @@ |
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void can_init(CAN_TypeDef *CAN) { |
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// enable CAN busses
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if (CAN == CAN1) { |
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// CAN1_EN
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GPIOB->ODR |= (1 << 3); |
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} else if (CAN == CAN2) { |
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// CAN2_EN
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GPIOB->ODR |= (1 << 4); |
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} |
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CAN->MCR = CAN_MCR_TTCM | CAN_MCR_INRQ; |
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while((CAN->MSR & CAN_MSR_INAK) != CAN_MSR_INAK); |
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puts("CAN initting\n"); |
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// PCLK = 24000000, 500000 is 48 clocks
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// from http://www.bittiming.can-wiki.ino/
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CAN->BTR = 0x001c0002; |
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// loopback mode for debugging
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#ifdef CAN_LOOPBACK_MODE |
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CAN->BTR |= CAN_BTR_SILM | CAN_BTR_LBKM; |
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#endif |
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// reset
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CAN->MCR = CAN_MCR_TTCM; |
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while((CAN->MSR & CAN_MSR_INAK) == CAN_MSR_INAK); |
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puts("CAN init done\n"); |
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// accept all filter
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CAN->FMR |= CAN_FMR_FINIT; |
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// no mask
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CAN->sFilterRegister[0].FR1 = 0; |
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CAN->sFilterRegister[0].FR2 = 0; |
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CAN->sFilterRegister[14].FR1 = 0; |
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CAN->sFilterRegister[14].FR2 = 0; |
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CAN->FA1R |= 1 | (1 << 14); |
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CAN->FMR &= ~(CAN_FMR_FINIT); |
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// enable all CAN interrupts
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CAN->IER = 0xFFFFFFFF; |
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//CAN->IER = CAN_IER_TMEIE | CAN_IER_FMPIE0 | CAN_IER_FMPIE1;
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} |
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// CAN error
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void can_sce(CAN_TypeDef *CAN) { |
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#ifdef DEBUG |
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puts("MSR:"); |
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puth(CAN->MSR); |
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puts(" TSR:"); |
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puth(CAN->TSR); |
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puts(" RF0R:"); |
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puth(CAN->RF0R); |
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puts(" RF1R:"); |
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puth(CAN->RF1R); |
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puts(" ESR:"); |
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puth(CAN->ESR); |
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puts("\n"); |
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#endif |
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// clear
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//CAN->sTxMailBox[0].TIR &= ~(CAN_TI0R_TXRQ);
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CAN->TSR |= CAN_TSR_ABRQ0; |
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//CAN->ESR |= CAN_ESR_LEC;
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//CAN->MSR &= ~(CAN_MSR_ERRI);
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CAN->MSR = CAN->MSR; |
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} |
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int can_cksum(uint8_t *dat, int len, int addr, int idx) { |
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int i; |
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int s = 0; |
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for (i = 0; i < len; i++) { |
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s += (dat[i] >> 4); |
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s += dat[i] & 0xF; |
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} |
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s += (addr>>0)&0xF; |
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s += (addr>>4)&0xF; |
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s += (addr>>8)&0xF; |
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s += idx; |
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s = 8-s; |
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return s&0xF; |
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} |
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void dac_init() { |
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// no buffers required since we have an opamp
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//DAC->CR = DAC_CR_EN1 | DAC_CR_BOFF1 | DAC_CR_EN2 | DAC_CR_BOFF2;
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DAC->DHR12R1 = 0; |
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DAC->DHR12R2 = 0; |
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DAC->CR = DAC_CR_EN1 | DAC_CR_EN2; |
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} |
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void dac_set(int channel, uint32_t value) { |
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if (channel == 0) { |
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DAC->DHR12R1 = value; |
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} else if (channel == 1) { |
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DAC->DHR12R2 = value; |
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} |
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} |
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Load Diff
@ -1,609 +0,0 @@ |
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/**************************************************************************//**
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* @file core_cmFunc.h |
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* @brief CMSIS Cortex-M Core Function Access Header File |
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* @version V2.10 |
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* @date 26. July 2011 |
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* |
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* @note |
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* Copyright (C) 2009-2011 ARM Limited. All rights reserved. |
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* |
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* @par |
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* ARM Limited (ARM) is supplying this software for use with Cortex-M
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* processor based microcontrollers. This file can be freely distributed
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* within development tools that are supporting such ARM based processors.
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* |
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* @par |
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* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
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* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR |
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* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
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* |
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******************************************************************************/ |
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#ifndef __CORE_CMFUNC_H |
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#define __CORE_CMFUNC_H |
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/* ########################### Core Function Access ########################### */ |
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/** \ingroup CMSIS_Core_FunctionInterface
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\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions |
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@{ |
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*/ |
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#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ |
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/* ARM armcc specific functions */ |
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#if (__ARMCC_VERSION < 400677) |
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#error "Please use ARM Compiler Toolchain V4.0.677 or later!" |
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#endif |
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/* intrinsic void __enable_irq(); */ |
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/* intrinsic void __disable_irq(); */ |
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/** \brief Get Control Register
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This function returns the content of the Control Register. |
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\return Control Register value |
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*/ |
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static __INLINE uint32_t __get_CONTROL(void) |
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{ |
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register uint32_t __regControl __ASM("control"); |
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return(__regControl); |
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} |
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/** \brief Set Control Register
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This function writes the given value to the Control Register. |
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\param [in] control Control Register value to set |
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*/ |
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static __INLINE void __set_CONTROL(uint32_t control) |
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{ |
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register uint32_t __regControl __ASM("control"); |
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__regControl = control; |
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} |
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/** \brief Get ISPR Register
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This function returns the content of the ISPR Register. |
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\return ISPR Register value |
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*/ |
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static __INLINE uint32_t __get_IPSR(void) |
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{ |
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register uint32_t __regIPSR __ASM("ipsr"); |
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return(__regIPSR); |
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} |
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/** \brief Get APSR Register
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This function returns the content of the APSR Register. |
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\return APSR Register value |
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*/ |
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static __INLINE uint32_t __get_APSR(void) |
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{ |
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register uint32_t __regAPSR __ASM("apsr"); |
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return(__regAPSR); |
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} |
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/** \brief Get xPSR Register
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This function returns the content of the xPSR Register. |
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\return xPSR Register value |
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*/ |
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static __INLINE uint32_t __get_xPSR(void) |
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{ |
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register uint32_t __regXPSR __ASM("xpsr"); |
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return(__regXPSR); |
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} |
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/** \brief Get Process Stack Pointer
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This function returns the current value of the Process Stack Pointer (PSP). |
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\return PSP Register value |
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*/ |
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static __INLINE uint32_t __get_PSP(void) |
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{ |
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register uint32_t __regProcessStackPointer __ASM("psp"); |
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return(__regProcessStackPointer); |
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} |
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/** \brief Set Process Stack Pointer
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This function assigns the given value to the Process Stack Pointer (PSP). |
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\param [in] topOfProcStack Process Stack Pointer value to set |
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*/ |
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static __INLINE void __set_PSP(uint32_t topOfProcStack) |
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{ |
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register uint32_t __regProcessStackPointer __ASM("psp"); |
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__regProcessStackPointer = topOfProcStack; |
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} |
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/** \brief Get Main Stack Pointer
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This function returns the current value of the Main Stack Pointer (MSP). |
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\return MSP Register value |
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*/ |
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static __INLINE uint32_t __get_MSP(void) |
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{ |
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register uint32_t __regMainStackPointer __ASM("msp"); |
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return(__regMainStackPointer); |
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} |
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/** \brief Set Main Stack Pointer
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This function assigns the given value to the Main Stack Pointer (MSP). |
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\param [in] topOfMainStack Main Stack Pointer value to set |
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*/ |
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static __INLINE void __set_MSP(uint32_t topOfMainStack) |
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{ |
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register uint32_t __regMainStackPointer __ASM("msp"); |
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__regMainStackPointer = topOfMainStack; |
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} |
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/** \brief Get Priority Mask
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This function returns the current state of the priority mask bit from the Priority Mask Register. |
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\return Priority Mask value |
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*/ |
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static __INLINE uint32_t __get_PRIMASK(void) |
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{ |
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register uint32_t __regPriMask __ASM("primask"); |
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return(__regPriMask); |
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} |
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/** \brief Set Priority Mask
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This function assigns the given value to the Priority Mask Register. |
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\param [in] priMask Priority Mask |
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*/ |
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static __INLINE void __set_PRIMASK(uint32_t priMask) |
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{ |
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register uint32_t __regPriMask __ASM("primask"); |
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__regPriMask = (priMask); |
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} |
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#if (__CORTEX_M >= 0x03) |
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/** \brief Enable FIQ
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This function enables FIQ interrupts by clearing the F-bit in the CPSR. |
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Can only be executed in Privileged modes. |
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*/ |
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#define __enable_fault_irq __enable_fiq |
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/** \brief Disable FIQ
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This function disables FIQ interrupts by setting the F-bit in the CPSR. |
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Can only be executed in Privileged modes. |
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*/ |
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#define __disable_fault_irq __disable_fiq |
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/** \brief Get Base Priority
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This function returns the current value of the Base Priority register. |
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\return Base Priority register value |
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*/ |
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static __INLINE uint32_t __get_BASEPRI(void) |
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{ |
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register uint32_t __regBasePri __ASM("basepri"); |
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return(__regBasePri); |
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} |
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/** \brief Set Base Priority
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This function assigns the given value to the Base Priority register. |
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\param [in] basePri Base Priority value to set |
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*/ |
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static __INLINE void __set_BASEPRI(uint32_t basePri) |
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{ |
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register uint32_t __regBasePri __ASM("basepri"); |
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__regBasePri = (basePri & 0xff); |
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} |
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/** \brief Get Fault Mask
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This function returns the current value of the Fault Mask register. |
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\return Fault Mask register value |
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*/ |
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static __INLINE uint32_t __get_FAULTMASK(void) |
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{ |
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register uint32_t __regFaultMask __ASM("faultmask"); |
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return(__regFaultMask); |
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} |
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/** \brief Set Fault Mask
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This function assigns the given value to the Fault Mask register. |
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\param [in] faultMask Fault Mask value to set |
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*/ |
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static __INLINE void __set_FAULTMASK(uint32_t faultMask) |
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{ |
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register uint32_t __regFaultMask __ASM("faultmask"); |
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__regFaultMask = (faultMask & (uint32_t)1); |
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} |
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#endif /* (__CORTEX_M >= 0x03) */ |
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#if (__CORTEX_M == 0x04) |
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/** \brief Get FPSCR
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This function returns the current value of the Floating Point Status/Control register. |
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\return Floating Point Status/Control register value |
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*/ |
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static __INLINE uint32_t __get_FPSCR(void) |
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{ |
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#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) |
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register uint32_t __regfpscr __ASM("fpscr"); |
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return(__regfpscr); |
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#else |
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return(0); |
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#endif |
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} |
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/** \brief Set FPSCR
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This function assigns the given value to the Floating Point Status/Control register. |
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\param [in] fpscr Floating Point Status/Control value to set |
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*/ |
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static __INLINE void __set_FPSCR(uint32_t fpscr) |
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{ |
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#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) |
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register uint32_t __regfpscr __ASM("fpscr"); |
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__regfpscr = (fpscr); |
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#endif |
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} |
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#endif /* (__CORTEX_M == 0x04) */ |
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#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/ |
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/* IAR iccarm specific functions */ |
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#include <cmsis_iar.h> |
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#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/ |
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/* GNU gcc specific functions */ |
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/** \brief Enable IRQ Interrupts
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This function enables IRQ interrupts by clearing the I-bit in the CPSR. |
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Can only be executed in Privileged modes. |
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*/ |
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__attribute__( ( always_inline ) ) static __INLINE void __enable_irq(void) |
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{ |
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__ASM volatile ("cpsie i"); |
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} |
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/** \brief Disable IRQ Interrupts
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This function disables IRQ interrupts by setting the I-bit in the CPSR. |
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Can only be executed in Privileged modes. |
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*/ |
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__attribute__( ( always_inline ) ) static __INLINE void __disable_irq(void) |
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{ |
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__ASM volatile ("cpsid i"); |
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} |
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/** \brief Get Control Register
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This function returns the content of the Control Register. |
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\return Control Register value |
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*/ |
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__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_CONTROL(void) |
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{ |
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uint32_t result; |
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__ASM volatile ("MRS %0, control" : "=r" (result) ); |
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return(result); |
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} |
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/** \brief Set Control Register
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This function writes the given value to the Control Register. |
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\param [in] control Control Register value to set |
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*/ |
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__attribute__( ( always_inline ) ) static __INLINE void __set_CONTROL(uint32_t control) |
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{ |
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__ASM volatile ("MSR control, %0" : : "r" (control) ); |
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} |
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/** \brief Get ISPR Register
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This function returns the content of the ISPR Register. |
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\return ISPR Register value |
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*/ |
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__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_IPSR(void) |
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{ |
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uint32_t result; |
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__ASM volatile ("MRS %0, ipsr" : "=r" (result) ); |
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return(result); |
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} |
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/** \brief Get APSR Register
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This function returns the content of the APSR Register. |
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|
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\return APSR Register value |
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*/ |
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__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_APSR(void) |
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{ |
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uint32_t result; |
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__ASM volatile ("MRS %0, apsr" : "=r" (result) ); |
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return(result); |
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} |
||||
|
||||
|
||||
/** \brief Get xPSR Register
|
||||
|
||||
This function returns the content of the xPSR Register. |
||||
|
||||
\return xPSR Register value |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_xPSR(void) |
||||
{ |
||||
uint32_t result; |
||||
|
||||
__ASM volatile ("MRS %0, xpsr" : "=r" (result) ); |
||||
return(result); |
||||
} |
||||
|
||||
|
||||
/** \brief Get Process Stack Pointer
|
||||
|
||||
This function returns the current value of the Process Stack Pointer (PSP). |
||||
|
||||
\return PSP Register value |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_PSP(void) |
||||
{ |
||||
register uint32_t result; |
||||
|
||||
__ASM volatile ("MRS %0, psp\n" : "=r" (result) ); |
||||
return(result); |
||||
} |
||||
|
||||
|
||||
/** \brief Set Process Stack Pointer
|
||||
|
||||
This function assigns the given value to the Process Stack Pointer (PSP). |
||||
|
||||
\param [in] topOfProcStack Process Stack Pointer value to set |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE void __set_PSP(uint32_t topOfProcStack) |
||||
{ |
||||
__ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) ); |
||||
} |
||||
|
||||
|
||||
/** \brief Get Main Stack Pointer
|
||||
|
||||
This function returns the current value of the Main Stack Pointer (MSP). |
||||
|
||||
\return MSP Register value |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_MSP(void) |
||||
{ |
||||
register uint32_t result; |
||||
|
||||
__ASM volatile ("MRS %0, msp\n" : "=r" (result) ); |
||||
return(result); |
||||
} |
||||
|
||||
|
||||
/** \brief Set Main Stack Pointer
|
||||
|
||||
This function assigns the given value to the Main Stack Pointer (MSP). |
||||
|
||||
\param [in] topOfMainStack Main Stack Pointer value to set |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE void __set_MSP(uint32_t topOfMainStack) |
||||
{ |
||||
__ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) ); |
||||
} |
||||
|
||||
|
||||
/** \brief Get Priority Mask
|
||||
|
||||
This function returns the current state of the priority mask bit from the Priority Mask Register. |
||||
|
||||
\return Priority Mask value |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_PRIMASK(void) |
||||
{ |
||||
uint32_t result; |
||||
|
||||
__ASM volatile ("MRS %0, primask" : "=r" (result) ); |
||||
return(result); |
||||
} |
||||
|
||||
|
||||
/** \brief Set Priority Mask
|
||||
|
||||
This function assigns the given value to the Priority Mask Register. |
||||
|
||||
\param [in] priMask Priority Mask |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE void __set_PRIMASK(uint32_t priMask) |
||||
{ |
||||
__ASM volatile ("MSR primask, %0" : : "r" (priMask) ); |
||||
} |
||||
|
||||
|
||||
#if (__CORTEX_M >= 0x03) |
||||
|
||||
/** \brief Enable FIQ
|
||||
|
||||
This function enables FIQ interrupts by clearing the F-bit in the CPSR. |
||||
Can only be executed in Privileged modes. |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE void __enable_fault_irq(void) |
||||
{ |
||||
__ASM volatile ("cpsie f"); |
||||
} |
||||
|
||||
|
||||
/** \brief Disable FIQ
|
||||
|
||||
This function disables FIQ interrupts by setting the F-bit in the CPSR. |
||||
Can only be executed in Privileged modes. |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE void __disable_fault_irq(void) |
||||
{ |
||||
__ASM volatile ("cpsid f"); |
||||
} |
||||
|
||||
|
||||
/** \brief Get Base Priority
|
||||
|
||||
This function returns the current value of the Base Priority register. |
||||
|
||||
\return Base Priority register value |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_BASEPRI(void) |
||||
{ |
||||
uint32_t result; |
||||
|
||||
__ASM volatile ("MRS %0, basepri_max" : "=r" (result) ); |
||||
return(result); |
||||
} |
||||
|
||||
|
||||
/** \brief Set Base Priority
|
||||
|
||||
This function assigns the given value to the Base Priority register. |
||||
|
||||
\param [in] basePri Base Priority value to set |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE void __set_BASEPRI(uint32_t value) |
||||
{ |
||||
__ASM volatile ("MSR basepri, %0" : : "r" (value) ); |
||||
} |
||||
|
||||
|
||||
/** \brief Get Fault Mask
|
||||
|
||||
This function returns the current value of the Fault Mask register. |
||||
|
||||
\return Fault Mask register value |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_FAULTMASK(void) |
||||
{ |
||||
uint32_t result; |
||||
|
||||
__ASM volatile ("MRS %0, faultmask" : "=r" (result) ); |
||||
return(result); |
||||
} |
||||
|
||||
|
||||
/** \brief Set Fault Mask
|
||||
|
||||
This function assigns the given value to the Fault Mask register. |
||||
|
||||
\param [in] faultMask Fault Mask value to set |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE void __set_FAULTMASK(uint32_t faultMask) |
||||
{ |
||||
__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) ); |
||||
} |
||||
|
||||
#endif /* (__CORTEX_M >= 0x03) */ |
||||
|
||||
|
||||
#if (__CORTEX_M == 0x04) |
||||
|
||||
/** \brief Get FPSCR
|
||||
|
||||
This function returns the current value of the Floating Point Status/Control register. |
||||
|
||||
\return Floating Point Status/Control register value |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_FPSCR(void) |
||||
{ |
||||
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) |
||||
uint32_t result; |
||||
|
||||
__ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); |
||||
return(result); |
||||
#else |
||||
return(0); |
||||
#endif |
||||
} |
||||
|
||||
|
||||
/** \brief Set FPSCR
|
||||
|
||||
This function assigns the given value to the Floating Point Status/Control register. |
||||
|
||||
\param [in] fpscr Floating Point Status/Control value to set |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE void __set_FPSCR(uint32_t fpscr) |
||||
{ |
||||
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) |
||||
__ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) ); |
||||
#endif |
||||
} |
||||
|
||||
#endif /* (__CORTEX_M == 0x04) */ |
||||
|
||||
|
||||
#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/ |
||||
/* TASKING carm specific functions */ |
||||
|
||||
/*
|
||||
* The CMSIS functions have been implemented as intrinsics in the compiler. |
||||
* Please use "carm -?i" to get an up to date list of all instrinsics, |
||||
* Including the CMSIS ones. |
||||
*/ |
||||
|
||||
#endif |
||||
|
||||
/*@} end of CMSIS_Core_RegAccFunctions */ |
||||
|
||||
|
||||
#endif /* __CORE_CMFUNC_H */ |
@ -1,585 +0,0 @@ |
||||
/**************************************************************************//**
|
||||
* @file core_cmInstr.h |
||||
* @brief CMSIS Cortex-M Core Instruction Access Header File |
||||
* @version V2.10 |
||||
* @date 19. July 2011 |
||||
* |
||||
* @note |
||||
* Copyright (C) 2009-2011 ARM Limited. All rights reserved. |
||||
* |
||||
* @par |
||||
* ARM Limited (ARM) is supplying this software for use with Cortex-M
|
||||
* processor based microcontrollers. This file can be freely distributed
|
||||
* within development tools that are supporting such ARM based processors.
|
||||
* |
||||
* @par |
||||
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
||||
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
||||
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR |
||||
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
||||
* |
||||
******************************************************************************/ |
||||
|
||||
#ifndef __CORE_CMINSTR_H |
||||
#define __CORE_CMINSTR_H |
||||
|
||||
|
||||
/* ########################## Core Instruction Access ######################### */ |
||||
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
|
||||
Access to dedicated instructions |
||||
@{ |
||||
*/ |
||||
|
||||
#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ |
||||
/* ARM armcc specific functions */ |
||||
|
||||
#if (__ARMCC_VERSION < 400677) |
||||
#error "Please use ARM Compiler Toolchain V4.0.677 or later!" |
||||
#endif |
||||
|
||||
|
||||
/** \brief No Operation
|
||||
|
||||
No Operation does nothing. This instruction can be used for code alignment purposes. |
||||
*/ |
||||
#define __NOP __nop |
||||
|
||||
|
||||
/** \brief Wait For Interrupt
|
||||
|
||||
Wait For Interrupt is a hint instruction that suspends execution |
||||
until one of a number of events occurs. |
||||
*/ |
||||
#define __WFI __wfi |
||||
|
||||
|
||||
/** \brief Wait For Event
|
||||
|
||||
Wait For Event is a hint instruction that permits the processor to enter |
||||
a low-power state until one of a number of events occurs. |
||||
*/ |
||||
#define __WFE __wfe |
||||
|
||||
|
||||
/** \brief Send Event
|
||||
|
||||
Send Event is a hint instruction. It causes an event to be signaled to the CPU. |
||||
*/ |
||||
#define __SEV __sev |
||||
|
||||
|
||||
/** \brief Instruction Synchronization Barrier
|
||||
|
||||
Instruction Synchronization Barrier flushes the pipeline in the processor,
|
||||
so that all instructions following the ISB are fetched from cache or
|
||||
memory, after the instruction has been completed. |
||||
*/ |
||||
#define __ISB() __isb(0xF) |
||||
|
||||
|
||||
/** \brief Data Synchronization Barrier
|
||||
|
||||
This function acts as a special kind of Data Memory Barrier.
|
||||
It completes when all explicit memory accesses before this instruction complete. |
||||
*/ |
||||
#define __DSB() __dsb(0xF) |
||||
|
||||
|
||||
/** \brief Data Memory Barrier
|
||||
|
||||
This function ensures the apparent order of the explicit memory operations before
|
||||
and after the instruction, without ensuring their completion. |
||||
*/ |
||||
#define __DMB() __dmb(0xF) |
||||
|
||||
|
||||
/** \brief Reverse byte order (32 bit)
|
||||
|
||||
This function reverses the byte order in integer value. |
||||
|
||||
\param [in] value Value to reverse |
||||
\return Reversed value |
||||
*/ |
||||
#define __REV __rev |
||||
|
||||
|
||||
/** \brief Reverse byte order (16 bit)
|
||||
|
||||
This function reverses the byte order in two unsigned short values. |
||||
|
||||
\param [in] value Value to reverse |
||||
\return Reversed value |
||||
*/ |
||||
static __INLINE __ASM uint32_t __REV16(uint32_t value) |
||||
{ |
||||
rev16 r0, r0 |
||||
bx lr |
||||
} |
||||
|
||||
|
||||
/** \brief Reverse byte order in signed short value
|
||||
|
||||
This function reverses the byte order in a signed short value with sign extension to integer. |
||||
|
||||
\param [in] value Value to reverse |
||||
\return Reversed value |
||||
*/ |
||||
static __INLINE __ASM int32_t __REVSH(int32_t value) |
||||
{ |
||||
revsh r0, r0 |
||||
bx lr |
||||
} |
||||
|
||||
|
||||
#if (__CORTEX_M >= 0x03) |
||||
|
||||
/** \brief Reverse bit order of value
|
||||
|
||||
This function reverses the bit order of the given value. |
||||
|
||||
\param [in] value Value to reverse |
||||
\return Reversed value |
||||
*/ |
||||
#define __RBIT __rbit |
||||
|
||||
|
||||
/** \brief LDR Exclusive (8 bit)
|
||||
|
||||
This function performs a exclusive LDR command for 8 bit value. |
||||
|
||||
\param [in] ptr Pointer to data |
||||
\return value of type uint8_t at (*ptr) |
||||
*/ |
||||
#define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr)) |
||||
|
||||
|
||||
/** \brief LDR Exclusive (16 bit)
|
||||
|
||||
This function performs a exclusive LDR command for 16 bit values. |
||||
|
||||
\param [in] ptr Pointer to data |
||||
\return value of type uint16_t at (*ptr) |
||||
*/ |
||||
#define __LDREXH(ptr) ((uint16_t) __ldrex(ptr)) |
||||
|
||||
|
||||
/** \brief LDR Exclusive (32 bit)
|
||||
|
||||
This function performs a exclusive LDR command for 32 bit values. |
||||
|
||||
\param [in] ptr Pointer to data |
||||
\return value of type uint32_t at (*ptr) |
||||
*/ |
||||
#define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr)) |
||||
|
||||
|
||||
/** \brief STR Exclusive (8 bit)
|
||||
|
||||
This function performs a exclusive STR command for 8 bit values. |
||||
|
||||
\param [in] value Value to store |
||||
\param [in] ptr Pointer to location |
||||
\return 0 Function succeeded |
||||
\return 1 Function failed |
||||
*/ |
||||
#define __STREXB(value, ptr) __strex(value, ptr) |
||||
|
||||
|
||||
/** \brief STR Exclusive (16 bit)
|
||||
|
||||
This function performs a exclusive STR command for 16 bit values. |
||||
|
||||
\param [in] value Value to store |
||||
\param [in] ptr Pointer to location |
||||
\return 0 Function succeeded |
||||
\return 1 Function failed |
||||
*/ |
||||
#define __STREXH(value, ptr) __strex(value, ptr) |
||||
|
||||
|
||||
/** \brief STR Exclusive (32 bit)
|
||||
|
||||
This function performs a exclusive STR command for 32 bit values. |
||||
|
||||
\param [in] value Value to store |
||||
\param [in] ptr Pointer to location |
||||
\return 0 Function succeeded |
||||
\return 1 Function failed |
||||
*/ |
||||
#define __STREXW(value, ptr) __strex(value, ptr) |
||||
|
||||
|
||||
/** \brief Remove the exclusive lock
|
||||
|
||||
This function removes the exclusive lock which is created by LDREX. |
||||
|
||||
*/ |
||||
#define __CLREX __clrex |
||||
|
||||
|
||||
/** \brief Signed Saturate
|
||||
|
||||
This function saturates a signed value. |
||||
|
||||
\param [in] value Value to be saturated |
||||
\param [in] sat Bit position to saturate to (1..32) |
||||
\return Saturated value |
||||
*/ |
||||
#define __SSAT __ssat |
||||
|
||||
|
||||
/** \brief Unsigned Saturate
|
||||
|
||||
This function saturates an unsigned value. |
||||
|
||||
\param [in] value Value to be saturated |
||||
\param [in] sat Bit position to saturate to (0..31) |
||||
\return Saturated value |
||||
*/ |
||||
#define __USAT __usat |
||||
|
||||
|
||||
/** \brief Count leading zeros
|
||||
|
||||
This function counts the number of leading zeros of a data value. |
||||
|
||||
\param [in] value Value to count the leading zeros |
||||
\return number of leading zeros in value |
||||
*/ |
||||
#define __CLZ __clz |
||||
|
||||
#endif /* (__CORTEX_M >= 0x03) */ |
||||
|
||||
|
||||
|
||||
#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/ |
||||
/* IAR iccarm specific functions */ |
||||
|
||||
#include <cmsis_iar.h> |
||||
|
||||
|
||||
#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/ |
||||
/* GNU gcc specific functions */ |
||||
|
||||
/** \brief No Operation
|
||||
|
||||
No Operation does nothing. This instruction can be used for code alignment purposes. |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE void __NOP(void) |
||||
{ |
||||
__ASM volatile ("nop"); |
||||
} |
||||
|
||||
|
||||
/** \brief Wait For Interrupt
|
||||
|
||||
Wait For Interrupt is a hint instruction that suspends execution |
||||
until one of a number of events occurs. |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE void __WFI(void) |
||||
{ |
||||
__ASM volatile ("wfi"); |
||||
} |
||||
|
||||
|
||||
/** \brief Wait For Event
|
||||
|
||||
Wait For Event is a hint instruction that permits the processor to enter |
||||
a low-power state until one of a number of events occurs. |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE void __WFE(void) |
||||
{ |
||||
__ASM volatile ("wfe"); |
||||
} |
||||
|
||||
|
||||
/** \brief Send Event
|
||||
|
||||
Send Event is a hint instruction. It causes an event to be signaled to the CPU. |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE void __SEV(void) |
||||
{ |
||||
__ASM volatile ("sev"); |
||||
} |
||||
|
||||
|
||||
/** \brief Instruction Synchronization Barrier
|
||||
|
||||
Instruction Synchronization Barrier flushes the pipeline in the processor,
|
||||
so that all instructions following the ISB are fetched from cache or
|
||||
memory, after the instruction has been completed. |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE void __ISB(void) |
||||
{ |
||||
__ASM volatile ("isb"); |
||||
} |
||||
|
||||
|
||||
/** \brief Data Synchronization Barrier
|
||||
|
||||
This function acts as a special kind of Data Memory Barrier.
|
||||
It completes when all explicit memory accesses before this instruction complete. |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE void __DSB(void) |
||||
{ |
||||
__ASM volatile ("dsb"); |
||||
} |
||||
|
||||
|
||||
/** \brief Data Memory Barrier
|
||||
|
||||
This function ensures the apparent order of the explicit memory operations before
|
||||
and after the instruction, without ensuring their completion. |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE void __DMB(void) |
||||
{ |
||||
__ASM volatile ("dmb"); |
||||
} |
||||
|
||||
|
||||
/** \brief Reverse byte order (32 bit)
|
||||
|
||||
This function reverses the byte order in integer value. |
||||
|
||||
\param [in] value Value to reverse |
||||
\return Reversed value |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __REV(uint32_t value) |
||||
{ |
||||
uint32_t result; |
||||
|
||||
__ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) ); |
||||
return(result); |
||||
} |
||||
|
||||
|
||||
/** \brief Reverse byte order (16 bit)
|
||||
|
||||
This function reverses the byte order in two unsigned short values. |
||||
|
||||
\param [in] value Value to reverse |
||||
\return Reversed value |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __REV16(uint32_t value) |
||||
{ |
||||
uint32_t result; |
||||
|
||||
__ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) ); |
||||
return(result); |
||||
} |
||||
|
||||
|
||||
/** \brief Reverse byte order in signed short value
|
||||
|
||||
This function reverses the byte order in a signed short value with sign extension to integer. |
||||
|
||||
\param [in] value Value to reverse |
||||
\return Reversed value |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE int32_t __REVSH(int32_t value) |
||||
{ |
||||
uint32_t result; |
||||
|
||||
__ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) ); |
||||
return((int32_t)result); |
||||
} |
||||
|
||||
|
||||
#if (__CORTEX_M >= 0x03) |
||||
|
||||
/** \brief Reverse bit order of value
|
||||
|
||||
This function reverses the bit order of the given value. |
||||
|
||||
\param [in] value Value to reverse |
||||
\return Reversed value |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __RBIT(uint32_t value) |
||||
{ |
||||
uint32_t result; |
||||
|
||||
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); |
||||
return(result); |
||||
} |
||||
|
||||
|
||||
/** \brief LDR Exclusive (8 bit)
|
||||
|
||||
This function performs a exclusive LDR command for 8 bit value. |
||||
|
||||
\param [in] ptr Pointer to data |
||||
\return value of type uint8_t at (*ptr) |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE uint8_t __LDREXB(volatile uint8_t *addr) |
||||
{ |
||||
uint8_t result; |
||||
|
||||
__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) ); |
||||
return(result); |
||||
} |
||||
|
||||
|
||||
/** \brief LDR Exclusive (16 bit)
|
||||
|
||||
This function performs a exclusive LDR command for 16 bit values. |
||||
|
||||
\param [in] ptr Pointer to data |
||||
\return value of type uint16_t at (*ptr) |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE uint16_t __LDREXH(volatile uint16_t *addr) |
||||
{ |
||||
uint16_t result; |
||||
|
||||
__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) ); |
||||
return(result); |
||||
} |
||||
|
||||
|
||||
/** \brief LDR Exclusive (32 bit)
|
||||
|
||||
This function performs a exclusive LDR command for 32 bit values. |
||||
|
||||
\param [in] ptr Pointer to data |
||||
\return value of type uint32_t at (*ptr) |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __LDREXW(volatile uint32_t *addr) |
||||
{ |
||||
uint32_t result; |
||||
|
||||
__ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) ); |
||||
return(result); |
||||
} |
||||
|
||||
|
||||
/** \brief STR Exclusive (8 bit)
|
||||
|
||||
This function performs a exclusive STR command for 8 bit values. |
||||
|
||||
\param [in] value Value to store |
||||
\param [in] ptr Pointer to location |
||||
\return 0 Function succeeded |
||||
\return 1 Function failed |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) |
||||
{ |
||||
uint32_t result; |
||||
|
||||
__ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); |
||||
return(result); |
||||
} |
||||
|
||||
|
||||
/** \brief STR Exclusive (16 bit)
|
||||
|
||||
This function performs a exclusive STR command for 16 bit values. |
||||
|
||||
\param [in] value Value to store |
||||
\param [in] ptr Pointer to location |
||||
\return 0 Function succeeded |
||||
\return 1 Function failed |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) |
||||
{ |
||||
uint32_t result; |
||||
|
||||
__ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); |
||||
return(result); |
||||
} |
||||
|
||||
|
||||
/** \brief STR Exclusive (32 bit)
|
||||
|
||||
This function performs a exclusive STR command for 32 bit values. |
||||
|
||||
\param [in] value Value to store |
||||
\param [in] ptr Pointer to location |
||||
\return 0 Function succeeded |
||||
\return 1 Function failed |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) |
||||
{ |
||||
uint32_t result; |
||||
|
||||
__ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); |
||||
return(result); |
||||
} |
||||
|
||||
|
||||
/** \brief Remove the exclusive lock
|
||||
|
||||
This function removes the exclusive lock which is created by LDREX. |
||||
|
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE void __CLREX(void) |
||||
{ |
||||
__ASM volatile ("clrex"); |
||||
} |
||||
|
||||
|
||||
/** \brief Signed Saturate
|
||||
|
||||
This function saturates a signed value. |
||||
|
||||
\param [in] value Value to be saturated |
||||
\param [in] sat Bit position to saturate to (1..32) |
||||
\return Saturated value |
||||
*/ |
||||
#define __SSAT(ARG1,ARG2) \ |
||||
({ \
|
||||
uint32_t __RES, __ARG1 = (ARG1); \
|
||||
__ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
|
||||
__RES; \
|
||||
}) |
||||
|
||||
|
||||
/** \brief Unsigned Saturate
|
||||
|
||||
This function saturates an unsigned value. |
||||
|
||||
\param [in] value Value to be saturated |
||||
\param [in] sat Bit position to saturate to (0..31) |
||||
\return Saturated value |
||||
*/ |
||||
#define __USAT(ARG1,ARG2) \ |
||||
({ \
|
||||
uint32_t __RES, __ARG1 = (ARG1); \
|
||||
__ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
|
||||
__RES; \
|
||||
}) |
||||
|
||||
|
||||
/** \brief Count leading zeros
|
||||
|
||||
This function counts the number of leading zeros of a data value. |
||||
|
||||
\param [in] value Value to count the leading zeros |
||||
\return number of leading zeros in value |
||||
*/ |
||||
__attribute__( ( always_inline ) ) static __INLINE uint8_t __CLZ(uint32_t value) |
||||
{ |
||||
uint8_t result; |
||||
|
||||
__ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) ); |
||||
return(result); |
||||
} |
||||
|
||||
#endif /* (__CORTEX_M >= 0x03) */ |
||||
|
||||
|
||||
|
||||
|
||||
#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/ |
||||
/* TASKING carm specific functions */ |
||||
|
||||
/*
|
||||
* The CMSIS functions have been implemented as intrinsics in the compiler. |
||||
* Please use "carm -?i" to get an up to date list of all intrinsics, |
||||
* Including the CMSIS ones. |
||||
*/ |
||||
|
||||
#endif |
||||
|
||||
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ |
||||
|
||||
#endif /* __CORE_CMINSTR_H */ |
File diff suppressed because it is too large
Load Diff
@ -1,197 +0,0 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32f2xx.h |
||||
* @author MCD Application Team |
||||
* @version V2.0.1 |
||||
* @date 25-March-2014 |
||||
* @brief CMSIS STM32F2xx Device Peripheral Access Layer Header File. |
||||
* |
||||
* The file is the unique include file that the application programmer |
||||
* is using in the C source code, usually in main.c. This file contains: |
||||
* - Configuration section that allows to select: |
||||
* - The STM32F2xx device used in the target application |
||||
* - To use or not the peripheral's drivers in application code(i.e. |
||||
* code will be based on direct access to peripheral's registers |
||||
* rather than drivers API), this option is controlled by |
||||
* "#define USE_HAL_DRIVER" |
||||
* |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @addtogroup stm32f2xx
|
||||
* @{ |
||||
*/ |
||||
|
||||
#ifndef __STM32F2xx_H |
||||
#define __STM32F2xx_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif /* __cplusplus */ |
||||
|
||||
/** @addtogroup Library_configuration_section
|
||||
* @{ |
||||
*/ |
||||
|
||||
/* Uncomment the line below according to the target STM32 device used in your
|
||||
application |
||||
*/ |
||||
|
||||
#if !defined (STM32F205xx) && !defined (STM32F215xx) && !defined (STM32F207xx) && !defined (STM32F217xx) |
||||
|
||||
/* #define STM32F205xx */ /*!< STM32Fxx Devices */ |
||||
/* #define STM32F215xx */ /*!< STM32Fxx Devices */ |
||||
/* #define STM32F207xx */ /*!< STM32Fxx Devices */ |
||||
/* #define STM32F217xx */ /*!< STM32Fxx Devices */ |
||||
|
||||
#endif |
||||
|
||||
/* Tip: To avoid modifying this file each time you need to switch between these
|
||||
devices, you can define the device in your toolchain compiler preprocessor. |
||||
*/ |
||||
#if !defined (USE_HAL_DRIVER) |
||||
/**
|
||||
* @brief Comment the line below if you will not use the peripherals drivers. |
||||
In this case, these drivers will not be included and the application code will |
||||
be based on direct access to peripherals registers |
||||
*/ |
||||
/*#define USE_HAL_DRIVER */ |
||||
#endif /* USE_HAL_DRIVER */ |
||||
|
||||
/**
|
||||
* @brief CMSIS Device version number V2.0.1 |
||||
*/ |
||||
#define __STM32F2xx_CMSIS_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */ |
||||
#define __STM32F2xx_CMSIS_DEVICE_VERSION_SUB1 (0x00) /*!< [23:16] sub1 version */ |
||||
#define __STM32F2xx_CMSIS_DEVICE_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */ |
||||
#define __STM32F2xx_CMSIS_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */ |
||||
#define __STM32F2xx_CMSIS_DEVICE_VERSION ((__CMSIS_DEVICE_VERSION_MAIN << 24)\ |
||||
|(__CMSIS_DEVICE_HAL_VERSION_SUB1 << 16)\
|
||||
|(__CMSIS_DEVICE_HAL_VERSION_SUB2 << 8 )\
|
||||
|(__CMSIS_DEVICE_HAL_VERSION_RC)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @addtogroup Device_Included
|
||||
* @{ |
||||
*/ |
||||
|
||||
#if defined(STM32F205xx) |
||||
#include "stm32f205xx.h" |
||||
#elif defined(STM32F215xx) |
||||
#include "stm32f215xx.h" |
||||
#elif defined(STM32F207xx) |
||||
#include "stm32f207xx.h" |
||||
#elif defined(STM32F217xx) |
||||
#include "stm32f217xx.h" |
||||
#else |
||||
#error "Please select first the target STM32F2xx device used in your application (in stm32f2xx.h file)" |
||||
#endif |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @addtogroup Exported_types
|
||||
* @{ |
||||
*/ |
||||
typedef enum |
||||
{ |
||||
RESET = 0, |
||||
SET = !RESET |
||||
} FlagStatus, ITStatus; |
||||
|
||||
typedef enum |
||||
{ |
||||
DISABLE = 0, |
||||
ENABLE = !DISABLE |
||||
} FunctionalState; |
||||
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) |
||||
|
||||
typedef enum |
||||
{ |
||||
ERROR = 0, |
||||
SUCCESS = !ERROR |
||||
} ErrorStatus; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/** @addtogroup Exported_macro
|
||||
* @{ |
||||
*/ |
||||
#define SET_BIT(REG, BIT) ((REG) |= (BIT)) |
||||
|
||||
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) |
||||
|
||||
#define READ_BIT(REG, BIT) ((REG) & (BIT)) |
||||
|
||||
#define CLEAR_REG(REG) ((REG) = (0x0)) |
||||
|
||||
#define WRITE_REG(REG, VAL) ((REG) = (VAL)) |
||||
|
||||
#define READ_REG(REG) ((REG)) |
||||
|
||||
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) |
||||
|
||||
#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL))) |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif /* __cplusplus */ |
||||
|
||||
#endif /* __STM32F2xx_H */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
@ -1,148 +0,0 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32f2xx_hal_def.h |
||||
* @author MCD Application Team |
||||
* @version V1.0.1 |
||||
* @date 25-March-2014 |
||||
* @brief This file contains HAL common defines, enumeration, macros and
|
||||
* structures definitions.
|
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32F2xx_HAL_DEF |
||||
#define __STM32F2xx_HAL_DEF |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32f2xx.h" |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
|
||||
/**
|
||||
* @brief HAL Status structures definition
|
||||
*/
|
||||
typedef enum
|
||||
{ |
||||
HAL_OK = 0x00, |
||||
HAL_ERROR = 0x01, |
||||
HAL_BUSY = 0x02, |
||||
HAL_TIMEOUT = 0x03 |
||||
} HAL_StatusTypeDef; |
||||
|
||||
/**
|
||||
* @brief HAL Lock structures definition
|
||||
*/ |
||||
typedef enum
|
||||
{ |
||||
HAL_UNLOCKED = 0x00, |
||||
HAL_LOCKED = 0x01
|
||||
} HAL_LockTypeDef; |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
#ifndef NULL |
||||
#define NULL (void *) 0 |
||||
#endif |
||||
|
||||
#define HAL_MAX_DELAY 0xFFFFFFFF |
||||
|
||||
#define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) != RESET) |
||||
#define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == RESET) |
||||
|
||||
#define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD_, __DMA_HANDLE_) \ |
||||
do{ \
|
||||
(__HANDLE__)->__PPP_DMA_FIELD_ = &(__DMA_HANDLE_); \
|
||||
(__DMA_HANDLE_).Parent = (__HANDLE__); \
|
||||
} while(0) |
||||
|
||||
#if (USE_RTOS == 1) |
||||
/* Reserved for future use */ |
||||
#else |
||||
#define __HAL_LOCK(__HANDLE__) \ |
||||
do{ \
|
||||
if((__HANDLE__)->Lock == HAL_LOCKED) \
|
||||
{ \
|
||||
return HAL_BUSY; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Lock = HAL_LOCKED; \
|
||||
} \
|
||||
}while (0) |
||||
|
||||
#define __HAL_UNLOCK(__HANDLE__) \ |
||||
do{ \
|
||||
(__HANDLE__)->Lock = HAL_UNLOCKED; \
|
||||
}while (0) |
||||
#endif /* USE_RTOS */ |
||||
|
||||
#if defined ( __GNUC__ ) |
||||
#ifndef __weak |
||||
#define __weak __attribute__((weak)) |
||||
#endif /* __weak */ |
||||
#ifndef __packed |
||||
#define __packed __attribute__((__packed__)) |
||||
#endif /* __packed */ |
||||
#endif /* __GNUC__ */ |
||||
|
||||
|
||||
/* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */ |
||||
#if defined (__GNUC__) /* GNU Compiler */ |
||||
#ifndef __ALIGN_END |
||||
#define __ALIGN_END __attribute__ ((aligned (4))) |
||||
#endif /* __ALIGN_END */ |
||||
#ifndef __ALIGN_BEGIN |
||||
#define __ALIGN_BEGIN |
||||
#endif /* __ALIGN_BEGIN */ |
||||
#else |
||||
#ifndef __ALIGN_END |
||||
#define __ALIGN_END |
||||
#endif /* __ALIGN_END */ |
||||
#ifndef __ALIGN_BEGIN |
||||
#if defined (__CC_ARM) /* ARM Compiler */ |
||||
#define __ALIGN_BEGIN __align(4) |
||||
#elif defined (__ICCARM__) /* IAR Compiler */ |
||||
#define __ALIGN_BEGIN |
||||
#elif defined (__TASKING__) /* TASKING Compiler */ |
||||
#define __ALIGN_BEGIN __align(4) |
||||
#endif /* __CC_ARM */ |
||||
#endif /* __ALIGN_BEGIN */ |
||||
#endif /* __GNUC__ */ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* ___STM32F2xx_HAL_DEF */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
@ -1,236 +0,0 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm32f2xx_hal_gpio_ex.h |
||||
* @author MCD Application Team |
||||
* @version V1.0.1 |
||||
* @date 25-March-2014 |
||||
* @brief Header file of GPIO HAL Extension module. |
||||
****************************************************************************** |
||||
* @attention
|
||||
* |
||||
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM32F2xx_HAL_GPIO_EX_H |
||||
#define __STM32F2xx_HAL_GPIO_EX_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm32f2xx_hal_def.h" |
||||
|
||||
/** @addtogroup STM32F2xx_HAL_Driver
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @addtogroup GPIO
|
||||
* @{ |
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/** @defgroup GPIO_Exported_Constants
|
||||
* @{ |
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Alternat_function_selection
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief AF 0 selection
|
||||
*/
|
||||
#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */ |
||||
#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */ |
||||
#define GPIO_AF0_TAMPER ((uint8_t)0x00) /* TAMPER (TAMPER_1 and TAMPER_2) Alternate Function mapping */ |
||||
#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */ |
||||
#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */ |
||||
|
||||
/**
|
||||
* @brief AF 1 selection
|
||||
*/
|
||||
#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */ |
||||
#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */ |
||||
|
||||
/**
|
||||
* @brief AF 2 selection
|
||||
*/
|
||||
#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */ |
||||
#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */ |
||||
#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */ |
||||
|
||||
/**
|
||||
* @brief AF 3 selection
|
||||
*/
|
||||
#define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */ |
||||
#define GPIO_AF3_TIM9 ((uint8_t)0x03) /* TIM9 Alternate Function mapping */ |
||||
#define GPIO_AF3_TIM10 ((uint8_t)0x03) /* TIM10 Alternate Function mapping */ |
||||
#define GPIO_AF3_TIM11 ((uint8_t)0x03) /* TIM11 Alternate Function mapping */ |
||||
|
||||
/**
|
||||
* @brief AF 4 selection
|
||||
*/
|
||||
#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */ |
||||
#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */ |
||||
#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */ |
||||
|
||||
/**
|
||||
* @brief AF 5 selection
|
||||
*/
|
||||
#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */ |
||||
#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2/I2S2 Alternate Function mapping */ |
||||
/**
|
||||
* @brief AF 6 selection
|
||||
*/
|
||||
#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3/I2S3 Alternate Function mapping */ |
||||
|
||||
/**
|
||||
* @brief AF 7 selection
|
||||
*/
|
||||
#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */ |
||||
#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */ |
||||
#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */ |
||||
|
||||
/**
|
||||
* @brief AF 8 selection
|
||||
*/
|
||||
#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */ |
||||
#define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */ |
||||
#define GPIO_AF8_USART6 ((uint8_t)0x08) /* USART6 Alternate Function mapping */ |
||||
|
||||
/**
|
||||
* @brief AF 9 selection
|
||||
*/
|
||||
#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */ |
||||
#define GPIO_AF9_CAN2 ((uint8_t)0x09) /* CAN2 Alternate Function mapping */ |
||||
#define GPIO_AF9_TIM12 ((uint8_t)0x09) /* TIM12 Alternate Function mapping */ |
||||
#define GPIO_AF9_TIM13 ((uint8_t)0x09) /* TIM13 Alternate Function mapping */ |
||||
#define GPIO_AF9_TIM14 ((uint8_t)0x09) /* TIM14 Alternate Function mapping */ |
||||
|
||||
/**
|
||||
* @brief AF 10 selection
|
||||
*/
|
||||
#define GPIO_AF10_OTG_FS ((uint8_t)0xA) /* OTG_FS Alternate Function mapping */ |
||||
#define GPIO_AF10_OTG_HS ((uint8_t)0xA) /* OTG_HS Alternate Function mapping */ |
||||
|
||||
/**
|
||||
* @brief AF 11 selection
|
||||
*/
|
||||
#if defined(STM32F207xx) || defined(STM32F217xx) |
||||
#define GPIO_AF11_ETH ((uint8_t)0x0B) /* ETHERNET Alternate Function mapping */ |
||||
#endif /* STM32F207xx || STM32F217xx */ |
||||
|
||||
/**
|
||||
* @brief AF 12 selection
|
||||
*/
|
||||
#define GPIO_AF12_FSMC ((uint8_t)0xC) /* FSMC Alternate Function mapping */ |
||||
#define GPIO_AF12_OTG_HS_FS ((uint8_t)0xC) /* OTG HS configured in FS, Alternate Function mapping */ |
||||
#define GPIO_AF12_SDIO ((uint8_t)0xC) /* SDIO Alternate Function mapping */ |
||||
|
||||
/**
|
||||
* @brief AF 13 selection
|
||||
*/
|
||||
#if defined(STM32F207xx) || defined(STM32F217xx) |
||||
#define GPIO_AF13_DCMI ((uint8_t)0x0D) /* DCMI Alternate Function mapping */ |
||||
#endif /* STM32F207xx || STM32F217xx */ |
||||
|
||||
/**
|
||||
* @brief AF 15 selection
|
||||
*/
|
||||
#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */ |
||||
|
||||
#if defined(STM32F207xx) || defined(STM32F217xx) |
||||
#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF9_TIM14) || \ |
||||
((AF) == GPIO_AF0_MCO) || ((AF) == GPIO_AF0_TAMPER) || \
|
||||
((AF) == GPIO_AF0_SWJ) || ((AF) == GPIO_AF0_TRACE) || \
|
||||
((AF) == GPIO_AF1_TIM1) || ((AF) == GPIO_AF1_TIM2) || \
|
||||
((AF) == GPIO_AF2_TIM3) || ((AF) == GPIO_AF2_TIM4) || \
|
||||
((AF) == GPIO_AF2_TIM5) || ((AF) == GPIO_AF3_TIM8) || \
|
||||
((AF) == GPIO_AF4_I2C1) || ((AF) == GPIO_AF4_I2C2) || \
|
||||
((AF) == GPIO_AF4_I2C3) || ((AF) == GPIO_AF5_SPI1) || \
|
||||
((AF) == GPIO_AF5_SPI2) || ((AF) == GPIO_AF9_TIM13) || \
|
||||
((AF) == GPIO_AF6_SPI3) || ((AF) == GPIO_AF9_TIM12) || \
|
||||
((AF) == GPIO_AF7_USART1) || ((AF) == GPIO_AF7_USART2) || \
|
||||
((AF) == GPIO_AF7_USART3) || ((AF) == GPIO_AF8_UART4) || \
|
||||
((AF) == GPIO_AF8_UART5) || ((AF) == GPIO_AF8_USART6) || \
|
||||
((AF) == GPIO_AF9_CAN1) || ((AF) == GPIO_AF9_CAN2) || \
|
||||
((AF) == GPIO_AF10_OTG_FS) || ((AF) == GPIO_AF10_OTG_HS) || \
|
||||
((AF) == GPIO_AF11_ETH) || ((AF) == GPIO_AF12_OTG_HS_FS) || \
|
||||
((AF) == GPIO_AF12_SDIO) || ((AF) == GPIO_AF13_DCMI) || \
|
||||
((AF) == GPIO_AF12_FSMC) || ((AF) == GPIO_AF15_EVENTOUT)) |
||||
#else /* STM32F207xx || STM32F217xx */ |
||||
#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF9_TIM14) || \ |
||||
((AF) == GPIO_AF0_MCO) || ((AF) == GPIO_AF0_TAMPER) || \
|
||||
((AF) == GPIO_AF0_SWJ) || ((AF) == GPIO_AF0_TRACE) || \
|
||||
((AF) == GPIO_AF1_TIM1) || ((AF) == GPIO_AF1_TIM2) || \
|
||||
((AF) == GPIO_AF2_TIM3) || ((AF) == GPIO_AF2_TIM4) || \
|
||||
((AF) == GPIO_AF2_TIM5) || ((AF) == GPIO_AF3_TIM8) || \
|
||||
((AF) == GPIO_AF4_I2C1) || ((AF) == GPIO_AF4_I2C2) || \
|
||||
((AF) == GPIO_AF4_I2C3) || ((AF) == GPIO_AF5_SPI1) || \
|
||||
((AF) == GPIO_AF5_SPI2) || ((AF) == GPIO_AF9_TIM13) || \
|
||||
((AF) == GPIO_AF6_SPI3) || ((AF) == GPIO_AF9_TIM12) || \
|
||||
((AF) == GPIO_AF7_USART1) || ((AF) == GPIO_AF7_USART2) || \
|
||||
((AF) == GPIO_AF7_USART3) || ((AF) == GPIO_AF8_UART4) || \
|
||||
((AF) == GPIO_AF8_UART5) || ((AF) == GPIO_AF8_USART6) || \
|
||||
((AF) == GPIO_AF9_CAN1) || ((AF) == GPIO_AF9_CAN2) || \
|
||||
((AF) == GPIO_AF10_OTG_FS) || ((AF) == GPIO_AF10_OTG_HS) || \
|
||||
((AF) == GPIO_AF12_OTG_HS_FS) || ((AF) == GPIO_AF12_SDIO) || \
|
||||
((AF) == GPIO_AF12_FSMC) || ((AF) == GPIO_AF15_EVENTOUT)) |
||||
#endif /* STM32F207xx || STM32F217xx */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macro ------------------------------------------------------------*/ |
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* __STM32F2xx_HAL_GPIO_EX_H */ |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
@ -1,99 +0,0 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file system_stm32f2xx.h |
||||
* @author MCD Application Team |
||||
* @version V1.0.0 |
||||
* @date 18-April-2011 |
||||
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File. |
||||
******************************************************************************
|
||||
* @attention |
||||
* |
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
||||
* |
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> |
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{ |
||||
*/ |
||||
|
||||
/** @addtogroup stm32f2xx_system
|
||||
* @{ |
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Define to prevent recursive inclusion |
||||
*/ |
||||
#ifndef __SYSTEM_STM32F2XX_H |
||||
#define __SYSTEM_STM32F2XX_H |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
/** @addtogroup STM32F2xx_System_Includes
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/** @addtogroup STM32F2xx_System_Exported_types
|
||||
* @{ |
||||
*/ |
||||
|
||||
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @addtogroup STM32F2xx_System_Exported_Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @addtogroup STM32F2xx_System_Exported_Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @addtogroup STM32F2xx_System_Exported_Functions
|
||||
* @{ |
||||
*/ |
||||
|
||||
extern void SystemInit(void); |
||||
extern void SystemCoreClockUpdate(void); |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /*__SYSTEM_STM32F2XX_H */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |
@ -1,231 +0,0 @@ |
||||
#define min(a,b) \ |
||||
({ __typeof__ (a) _a = (a); \
|
||||
__typeof__ (b) _b = (b); \
|
||||
_a < _b ? _a : _b; }) |
||||
|
||||
#define max(a,b) \ |
||||
({ __typeof__ (a) _a = (a); \
|
||||
__typeof__ (b) _b = (b); \
|
||||
_a > _b ? _a : _b; }) |
||||
|
||||
#define __DIV(_PCLK_, _BAUD_) (((_PCLK_)*25)/(4*(_BAUD_))) |
||||
#define __DIVMANT(_PCLK_, _BAUD_) (__DIV((_PCLK_), (_BAUD_))/100) |
||||
#define __DIVFRAQ(_PCLK_, _BAUD_) (((__DIV((_PCLK_), (_BAUD_)) - (__DIVMANT((_PCLK_), (_BAUD_)) * 100)) * 16 + 50) / 100) |
||||
#define __USART_BRR(_PCLK_, _BAUD_) ((__DIVMANT((_PCLK_), (_BAUD_)) << 4)|(__DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0F)) |
||||
|
||||
#include "stm32f2xx_hal_gpio_ex.h" |
||||
|
||||
// **** shitty libc ****
|
||||
|
||||
void clock_init() { |
||||
#ifdef USE_INTERNAL_OSC |
||||
// enable internal oscillator
|
||||
RCC->CR |= RCC_CR_HSION; |
||||
while ((RCC->CR & RCC_CR_HSIRDY) == 0); |
||||
#else |
||||
// enable external oscillator
|
||||
RCC->CR |= RCC_CR_HSEON; |
||||
while ((RCC->CR & RCC_CR_HSERDY) == 0); |
||||
#endif |
||||
|
||||
// divide shit
|
||||
RCC->CFGR = RCC_CFGR_HPRE_DIV1 | RCC_CFGR_PPRE2_DIV2 | RCC_CFGR_PPRE1_DIV4; |
||||
#ifdef USE_INTERNAL_OSC |
||||
RCC->PLLCFGR = RCC_PLLCFGR_PLLQ_2 | RCC_PLLCFGR_PLLM_3 | |
||||
RCC_PLLCFGR_PLLN_6 | RCC_PLLCFGR_PLLN_5 | RCC_PLLCFGR_PLLSRC_HSI; |
||||
#else |
||||
RCC->PLLCFGR = RCC_PLLCFGR_PLLQ_2 | RCC_PLLCFGR_PLLM_3 | |
||||
RCC_PLLCFGR_PLLN_7 | RCC_PLLCFGR_PLLN_6 | RCC_PLLCFGR_PLLSRC_HSE; |
||||
#endif |
||||
|
||||
// start PLL
|
||||
RCC->CR |= RCC_CR_PLLON; |
||||
while ((RCC->CR & RCC_CR_PLLRDY) == 0); |
||||
|
||||
// Configure Flash prefetch, Instruction cache, Data cache and wait state
|
||||
// *** without this, it breaks ***
|
||||
FLASH->ACR = FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_5WS; |
||||
|
||||
// switch to PLL
|
||||
RCC->CFGR |= RCC_CFGR_SW_PLL; |
||||
while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL); |
||||
|
||||
// *** running on PLL ***
|
||||
|
||||
// enable GPIOB, UART2, CAN, USB clock
|
||||
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN; |
||||
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; |
||||
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; |
||||
|
||||
RCC->AHB1ENR |= RCC_AHB1ENR_DMA2EN; |
||||
|
||||
RCC->APB1ENR |= RCC_APB1ENR_USART2EN; |
||||
RCC->APB1ENR |= RCC_APB1ENR_USART3EN; |
||||
RCC->APB1ENR |= RCC_APB1ENR_CAN1EN; |
||||
RCC->APB1ENR |= RCC_APB1ENR_CAN2EN; |
||||
RCC->APB1ENR |= RCC_APB1ENR_DACEN; |
||||
RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; |
||||
//RCC->APB1ENR |= RCC_APB1ENR_TIM4EN;
|
||||
RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN; |
||||
RCC->APB2ENR |= RCC_APB2ENR_TIM1EN; |
||||
RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; |
||||
RCC->APB2ENR |= RCC_APB2ENR_SPI1EN; |
||||
|
||||
// turn on alt USB
|
||||
RCC->AHB1ENR |= RCC_AHB1ENR_OTGHSEN; |
||||
|
||||
// fix interrupt vectors
|
||||
} |
||||
|
||||
// board specific
|
||||
void gpio_init() { |
||||
// analog mode
|
||||
GPIOC->MODER = GPIO_MODER_MODER3 | GPIO_MODER_MODER2 | |
||||
GPIO_MODER_MODER1 | GPIO_MODER_MODER0; |
||||
|
||||
// FAN on C9, aka TIM3_CH4
|
||||
#ifdef OLD_BOARD |
||||
GPIOC->MODER |= GPIO_MODER_MODER9_1; |
||||
GPIOC->AFR[1] = GPIO_AF2_TIM3 << ((9-8)*4); |
||||
#else |
||||
GPIOC->MODER |= GPIO_MODER_MODER8_1; |
||||
GPIOC->AFR[1] = GPIO_AF2_TIM3 << ((8-8)*4); |
||||
#endif |
||||
// IGNITION on C13
|
||||
|
||||
// set mode for LEDs and CAN
|
||||
GPIOB->MODER = GPIO_MODER_MODER10_0 | GPIO_MODER_MODER11_0 | GPIO_MODER_MODER12_0; |
||||
// CAN 2
|
||||
GPIOB->MODER |= GPIO_MODER_MODER5_1 | GPIO_MODER_MODER6_1; |
||||
// CAN 1
|
||||
GPIOB->MODER |= GPIO_MODER_MODER8_1 | GPIO_MODER_MODER9_1; |
||||
// CAN enables
|
||||
GPIOB->MODER |= GPIO_MODER_MODER3_0 | GPIO_MODER_MODER4_0; |
||||
|
||||
// set mode for SERIAL and USB (DAC should be configured to in)
|
||||
GPIOA->MODER = GPIO_MODER_MODER2_1 | GPIO_MODER_MODER3_1; |
||||
GPIOA->AFR[0] = GPIO_AF7_USART2 << (2*4) | GPIO_AF7_USART2 << (3*4); |
||||
|
||||
// GPIOC USART3
|
||||
GPIOC->MODER |= GPIO_MODER_MODER10_1 | GPIO_MODER_MODER11_1; |
||||
GPIOC->AFR[1] |= GPIO_AF7_USART3 << ((10-8)*4) | GPIO_AF7_USART3 << ((11-8)*4); |
||||
|
||||
if (USBx == USB_OTG_FS) { |
||||
GPIOA->MODER |= GPIO_MODER_MODER11_1 | GPIO_MODER_MODER12_1; |
||||
GPIOA->OSPEEDR = GPIO_OSPEEDER_OSPEEDR11 | GPIO_OSPEEDER_OSPEEDR12; |
||||
GPIOA->AFR[1] = GPIO_AF10_OTG_FS << ((11-8)*4) | GPIO_AF10_OTG_FS << ((12-8)*4); |
||||
} |
||||
|
||||
GPIOA->PUPDR = GPIO_PUPDR_PUPDR2_0 | GPIO_PUPDR_PUPDR3_0; |
||||
|
||||
// setup SPI
|
||||
GPIOA->MODER |= GPIO_MODER_MODER4_1 | GPIO_MODER_MODER5_1 | |
||||
GPIO_MODER_MODER6_1 | GPIO_MODER_MODER7_1; |
||||
GPIOA->AFR[0] |= GPIO_AF5_SPI1 << (4*4) | GPIO_AF5_SPI1 << (5*4) | |
||||
GPIO_AF5_SPI1 << (6*4) | GPIO_AF5_SPI1 << (7*4); |
||||
|
||||
// set mode for CAN / USB_HS pins
|
||||
GPIOB->AFR[0] = GPIO_AF9_CAN1 << (5*4) | GPIO_AF9_CAN1 << (6*4); |
||||
GPIOB->AFR[1] = GPIO_AF9_CAN1 << ((8-8)*4) | GPIO_AF9_CAN1 << ((9-8)*4); |
||||
|
||||
if (USBx == USB_OTG_HS) { |
||||
GPIOB->AFR[1] |= GPIO_AF12_OTG_HS_FS << ((15-8)*4) | GPIO_AF12_OTG_HS_FS << ((14-8)*4); |
||||
GPIOB->MODER |= GPIO_MODER_MODER14_1 | GPIO_MODER_MODER15_1; |
||||
} |
||||
|
||||
GPIOB->OSPEEDR = GPIO_OSPEEDER_OSPEEDR14 | GPIO_OSPEEDER_OSPEEDR15; |
||||
|
||||
// enable OTG out tied to ground
|
||||
GPIOA->ODR = 0; |
||||
GPIOA->MODER |= GPIO_MODER_MODER1_0; |
||||
|
||||
// enable USB power tied to +
|
||||
GPIOA->ODR |= 1; |
||||
GPIOA->MODER |= GPIO_MODER_MODER0_0; |
||||
} |
||||
|
||||
void uart_init() { |
||||
// enable uart and tx+rx mode
|
||||
USART->CR1 = USART_CR1_UE; |
||||
USART->BRR = __USART_BRR(24000000, 115200); |
||||
USART->CR1 |= USART_CR1_TE | USART_CR1_RE; |
||||
USART->CR2 = USART_CR2_STOP_0 | USART_CR2_STOP_1; |
||||
// ** UART is ready to work **
|
||||
|
||||
// enable interrupts
|
||||
USART->CR1 |= USART_CR1_RXNEIE; |
||||
} |
||||
|
||||
void delay(int a) { |
||||
volatile int i; |
||||
for (i=0;i<a;i++); |
||||
} |
||||
|
||||
void putch(const char a) { |
||||
while (!(USART->SR & USART_SR_TXE)); |
||||
USART->DR = a; |
||||
} |
||||
|
||||
int puts(const char *a) { |
||||
for (;*a;a++) { |
||||
if (*a == '\n') putch('\r'); |
||||
putch(*a); |
||||
} |
||||
return 0; |
||||
} |
||||
|
||||
void puth(unsigned int i) { |
||||
int pos; |
||||
char c[] = "0123456789abcdef"; |
||||
for (pos = 28; pos != -4; pos -= 4) { |
||||
putch(c[(i >> pos) & 0xF]); |
||||
} |
||||
} |
||||
|
||||
void puth2(unsigned int i) { |
||||
int pos; |
||||
char c[] = "0123456789abcdef"; |
||||
for (pos = 4; pos != -4; pos -= 4) { |
||||
putch(c[(i >> pos) & 0xF]); |
||||
} |
||||
} |
||||
|
||||
void hexdump(void *a, int l) { |
||||
int i; |
||||
for (i=0;i<l;i++) { |
||||
if (i != 0 && (i&0xf) == 0) puts("\n"); |
||||
puth2(((unsigned char*)a)[i]); |
||||
puts(" "); |
||||
} |
||||
puts("\n"); |
||||
} |
||||
|
||||
void *memset(void *str, int c, unsigned int n) { |
||||
int i; |
||||
for (i = 0; i < n; i++) { |
||||
*((uint8_t*)str) = c; |
||||
++str; |
||||
} |
||||
return str; |
||||
} |
||||
|
||||
void *memcpy(void *dest, const void *src, unsigned int n) { |
||||
int i; |
||||
// TODO: make not slow
|
||||
for (i = 0; i < n; i++) { |
||||
((uint8_t*)dest)[i] = *(uint8_t*)src; |
||||
++src; |
||||
} |
||||
return dest; |
||||
} |
||||
|
||||
void set_led(int led_num, int state) { |
||||
if (state) { |
||||
// turn on
|
||||
GPIOB->ODR &= ~(1 << (10 + led_num)); |
||||
} else { |
||||
// turn off
|
||||
GPIOB->ODR |= (1 << (10 + led_num)); |
||||
} |
||||
} |
||||
|
@ -1,592 +0,0 @@ |
||||
//#define DEBUG
|
||||
//#define CAN_LOOPBACK_MODE
|
||||
//#define USE_INTERNAL_OSC
|
||||
//#define OLD_BOARD
|
||||
//#define ENABLE_CURRENT_SENSOR
|
||||
//#define ENABLE_SPI
|
||||
|
||||
// choose serial port for debugging
|
||||
//#define USART USART2
|
||||
#define USART USART3 |
||||
|
||||
#define USB_VID 0xbbaa |
||||
#define USB_PID 0xddcc |
||||
|
||||
// *** end config ***
|
||||
|
||||
#include "stm32f2xx.h" |
||||
#include "obj/gitversion.h" |
||||
|
||||
#define ENTER_BOOTLOADER_MAGIC 0xdeadbeef |
||||
uint32_t enter_bootloader_mode; |
||||
|
||||
USB_OTG_GlobalTypeDef *USBx = USB_OTG_FS; |
||||
|
||||
#include "libc.h" |
||||
#include "adc.h" |
||||
#include "timer.h" |
||||
#include "usb.h" |
||||
#include "can.h" |
||||
#include "spi.h" |
||||
|
||||
// debug safety check: is controls allowed?
|
||||
int controls_allowed = 0; |
||||
int started = 0; |
||||
int can_live = 0, pending_can_live = 0; |
||||
|
||||
// optional features
|
||||
int gas_interceptor_detected = 0; |
||||
int started_signal_detected = 0; |
||||
|
||||
// ********************* instantiate queues *********************
|
||||
|
||||
#define FIFO_SIZE 0x100 |
||||
typedef struct { |
||||
uint8_t w_ptr; |
||||
uint8_t r_ptr; |
||||
CAN_FIFOMailBox_TypeDef elems[FIFO_SIZE]; |
||||
} can_ring; |
||||
|
||||
can_ring can_rx_q = { .w_ptr = 0, .r_ptr = 0 }; |
||||
can_ring can_tx1_q = { .w_ptr = 0, .r_ptr = 0 }; |
||||
can_ring can_tx2_q = { .w_ptr = 0, .r_ptr = 0 }; |
||||
|
||||
// ********************* interrupt safe queue *********************
|
||||
|
||||
inline int pop(can_ring *q, CAN_FIFOMailBox_TypeDef *elem) { |
||||
if (q->w_ptr != q->r_ptr) { |
||||
*elem = q->elems[q->r_ptr]; |
||||
q->r_ptr += 1; |
||||
return 1; |
||||
} |
||||
return 0; |
||||
} |
||||
|
||||
inline int push(can_ring *q, CAN_FIFOMailBox_TypeDef *elem) { |
||||
uint8_t next_w_ptr = q->w_ptr + 1; |
||||
if (next_w_ptr != q->r_ptr) { |
||||
q->elems[q->w_ptr] = *elem; |
||||
q->w_ptr = next_w_ptr; |
||||
return 1; |
||||
} |
||||
return 0; |
||||
} |
||||
|
||||
// ***************************** CAN *****************************
|
||||
|
||||
void process_can(CAN_TypeDef *CAN, can_ring *can_q, int can_number) { |
||||
#ifdef DEBUG |
||||
puts("process CAN TX\n"); |
||||
#endif |
||||
|
||||
// add successfully transmitted message to my fifo
|
||||
if ((CAN->TSR & CAN_TSR_TXOK0) == CAN_TSR_TXOK0) { |
||||
CAN_FIFOMailBox_TypeDef to_push; |
||||
to_push.RIR = CAN->sTxMailBox[0].TIR; |
||||
to_push.RDTR = (CAN->sTxMailBox[0].TDTR & 0xFFFF000F) | ((can_number+2) << 4); |
||||
to_push.RDLR = CAN->sTxMailBox[0].TDLR; |
||||
to_push.RDHR = CAN->sTxMailBox[0].TDHR; |
||||
push(&can_rx_q, &to_push); |
||||
} |
||||
|
||||
// check for empty mailbox
|
||||
CAN_FIFOMailBox_TypeDef to_send; |
||||
if ((CAN->TSR & CAN_TSR_TME0) == CAN_TSR_TME0) { |
||||
if (pop(can_q, &to_send)) { |
||||
|
||||
// BRAKE: safety check
|
||||
if ((to_send.RIR>>21) == 0x1FA) { |
||||
if (controls_allowed) { |
||||
to_send.RDLR &= 0xFFFFFF3F; |
||||
} else { |
||||
to_send.RDLR &= 0xFFFF0000; |
||||
} |
||||
} |
||||
|
||||
// STEER: safety check
|
||||
if ((to_send.RIR>>21) == 0xE4) { |
||||
if (controls_allowed) { |
||||
to_send.RDLR &= 0xFFFFFFFF; |
||||
} else { |
||||
to_send.RDLR &= 0xFFFF0000; |
||||
} |
||||
}
|
||||
|
||||
// GAS: safety check
|
||||
if ((to_send.RIR>>21) == 0x200) { |
||||
if (controls_allowed) { |
||||
to_send.RDLR &= 0xFFFFFFFF; |
||||
} else { |
||||
to_send.RDLR &= 0xFFFF0000; |
||||
} |
||||
}
|
||||
|
||||
// only send if we have received a packet
|
||||
CAN->sTxMailBox[0].TDLR = to_send.RDLR; |
||||
CAN->sTxMailBox[0].TDHR = to_send.RDHR; |
||||
CAN->sTxMailBox[0].TDTR = to_send.RDTR; |
||||
CAN->sTxMailBox[0].TIR = to_send.RIR; |
||||
} |
||||
} |
||||
|
||||
// clear interrupt
|
||||
CAN->TSR |= CAN_TSR_RQCP0; |
||||
} |
||||
|
||||
// send more, possible for these to not trigger?
|
||||
void CAN1_TX_IRQHandler() { |
||||
process_can(CAN1, &can_tx1_q, 1); |
||||
} |
||||
|
||||
void CAN2_TX_IRQHandler() { |
||||
process_can(CAN2, &can_tx2_q, 0); |
||||
} |
||||
|
||||
// board enforces
|
||||
// in-state
|
||||
// accel set/resume
|
||||
// out-state
|
||||
// cancel button
|
||||
|
||||
|
||||
// all commands: brake and steering
|
||||
// if controls_allowed
|
||||
// allow all commands up to limit
|
||||
// else
|
||||
// block all commands that produce actuation
|
||||
|
||||
// CAN receive handlers
|
||||
void can_rx(CAN_TypeDef *CAN, int can_number) { |
||||
while (CAN->RF0R & CAN_RF0R_FMP0) { |
||||
// can is live
|
||||
pending_can_live = 1; |
||||
|
||||
// add to my fifo
|
||||
CAN_FIFOMailBox_TypeDef to_push; |
||||
to_push.RIR = CAN->sFIFOMailBox[0].RIR; |
||||
// top 16-bits is the timestamp
|
||||
to_push.RDTR = (CAN->sFIFOMailBox[0].RDTR & 0xFFFF000F) | (can_number << 4); |
||||
to_push.RDLR = CAN->sFIFOMailBox[0].RDLR; |
||||
to_push.RDHR = CAN->sFIFOMailBox[0].RDHR; |
||||
|
||||
// state machine to enter and exit controls
|
||||
// 0x1A6 for the ILX, 0x296 for the Civic Touring
|
||||
if ((to_push.RIR>>21) == 0x1A6 || (to_push.RIR>>21) == 0x296) { |
||||
int buttons = (to_push.RDLR & 0xE0) >> 5; |
||||
if (buttons == 4 || buttons == 3) { |
||||
controls_allowed = 1; |
||||
} else if (buttons == 2) { |
||||
controls_allowed = 0; |
||||
} |
||||
} |
||||
|
||||
// exit controls on brake press
|
||||
if ((to_push.RIR>>21) == 0x17C) { |
||||
// bit 50
|
||||
if (to_push.RDHR & 0x200000) { |
||||
controls_allowed = 0; |
||||
} |
||||
} |
||||
|
||||
// exit controls on gas press if interceptor
|
||||
if ((to_push.RIR>>21) == 0x201) { |
||||
gas_interceptor_detected = 1; |
||||
int gas = ((to_push.RDLR & 0xFF) << 8) | ((to_push.RDLR & 0xFF00) >> 8); |
||||
if (gas > 328) { |
||||
controls_allowed = 0; |
||||
} |
||||
} |
||||
|
||||
// exit controls on gas press if no interceptor
|
||||
if (!gas_interceptor_detected) { |
||||
if ((to_push.RIR>>21) == 0x17C) { |
||||
if (to_push.RDLR & 0xFF) { |
||||
controls_allowed = 0; |
||||
} |
||||
} |
||||
} |
||||
|
||||
push(&can_rx_q, &to_push); |
||||
|
||||
// next
|
||||
CAN->RF0R |= CAN_RF0R_RFOM0; |
||||
} |
||||
} |
||||
|
||||
void CAN1_RX0_IRQHandler() { |
||||
//puts("CANRX1");
|
||||
//delay(10000);
|
||||
can_rx(CAN1, 1); |
||||
} |
||||
|
||||
void CAN2_RX0_IRQHandler() { |
||||
//puts("CANRX0");
|
||||
//delay(10000);
|
||||
can_rx(CAN2, 0); |
||||
} |
||||
|
||||
void CAN1_SCE_IRQHandler() { |
||||
//puts("CAN1_SCE\n");
|
||||
can_sce(CAN1); |
||||
} |
||||
|
||||
void CAN2_SCE_IRQHandler() { |
||||
//puts("CAN2_SCE\n");
|
||||
can_sce(CAN2); |
||||
} |
||||
|
||||
// ***************************** serial port *****************************
|
||||
|
||||
void USART_IRQHandler(void) { |
||||
puts("S"); |
||||
|
||||
// echo characters
|
||||
if (USART->SR & USART_SR_RXNE) { |
||||
char rcv = USART->DR; |
||||
putch(rcv); |
||||
|
||||
// jump to DFU flash
|
||||
if (rcv == 'z') { |
||||
enter_bootloader_mode = ENTER_BOOTLOADER_MAGIC; |
||||
NVIC_SystemReset(); |
||||
} |
||||
} |
||||
} |
||||
|
||||
void USART2_IRQHandler(void) { |
||||
USART_IRQHandler(); |
||||
} |
||||
|
||||
void USART3_IRQHandler(void) { |
||||
USART_IRQHandler(); |
||||
} |
||||
|
||||
// ***************************** USB port *****************************
|
||||
|
||||
int get_health_pkt(void *dat) { |
||||
struct { |
||||
uint32_t voltage; |
||||
uint32_t current; |
||||
uint8_t started; |
||||
uint8_t controls_allowed; |
||||
uint8_t gas_interceptor_detected; |
||||
uint8_t started_signal_detected; |
||||
} *health = dat; |
||||
health->voltage = adc_get(ADCCHAN_VOLTAGE); |
||||
#ifdef ENABLE_CURRENT_SENSOR |
||||
health->current = adc_get(ADCCHAN_CURRENT); |
||||
#else |
||||
health->current = 0; |
||||
#endif |
||||
health->started = started; |
||||
|
||||
health->controls_allowed = controls_allowed; |
||||
|
||||
health->gas_interceptor_detected = gas_interceptor_detected; |
||||
health->started_signal_detected = started_signal_detected; |
||||
return sizeof(*health); |
||||
} |
||||
|
||||
void set_fan_speed(int fan_speed) { |
||||
#ifdef OLD_BOARD |
||||
TIM3->CCR4 = fan_speed; |
||||
#else |
||||
TIM3->CCR3 = fan_speed; |
||||
#endif |
||||
} |
||||
|
||||
void usb_cb_ep1_in(int len) { |
||||
CAN_FIFOMailBox_TypeDef reply[4]; |
||||
|
||||
int ilen = 0; |
||||
while (ilen < min(len/0x10, 4) && pop(&can_rx_q, &reply[ilen])) ilen++; |
||||
|
||||
#ifdef DEBUG |
||||
puts("FIFO SENDING "); |
||||
puth(ilen); |
||||
puts("\n"); |
||||
#endif |
||||
|
||||
USB_WritePacket((void *)reply, ilen*0x10, 1); |
||||
} |
||||
|
||||
void usb_cb_ep2_out(uint8_t *usbdata, int len) { |
||||
} |
||||
|
||||
// send on CAN
|
||||
void usb_cb_ep3_out(uint8_t *usbdata, int len) { |
||||
int dpkt = 0; |
||||
for (dpkt = 0; dpkt < len; dpkt += 0x10) { |
||||
uint32_t *tf = (uint32_t*)(&usbdata[dpkt]); |
||||
|
||||
int flags = tf[1] >> 4; |
||||
CAN_TypeDef *CAN; |
||||
can_ring *can_q; |
||||
int can_number = 0; |
||||
if (flags & 1) { |
||||
CAN=CAN1; |
||||
can_q = &can_tx1_q; |
||||
can_number = 1; |
||||
} else { |
||||
CAN=CAN2; |
||||
can_q = &can_tx2_q; |
||||
} |
||||
|
||||
// add CAN packet to send queue
|
||||
CAN_FIFOMailBox_TypeDef to_push; |
||||
to_push.RDHR = tf[3]; |
||||
to_push.RDLR = tf[2]; |
||||
to_push.RDTR = tf[1] & 0xF; |
||||
to_push.RIR = tf[0]; |
||||
push(can_q, &to_push); |
||||
|
||||
process_can(CAN, can_q, can_number); |
||||
} |
||||
} |
||||
|
||||
|
||||
void usb_cb_control_msg() { |
||||
uint8_t resp[0x20]; |
||||
int resp_len; |
||||
switch (setup.b.bRequest) { |
||||
case 0xd1: |
||||
enter_bootloader_mode = ENTER_BOOTLOADER_MAGIC; |
||||
NVIC_SystemReset(); |
||||
break; |
||||
case 0xd2: |
||||
resp_len = get_health_pkt(resp); |
||||
USB_WritePacket(resp, resp_len, 0); |
||||
USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK; |
||||
break; |
||||
case 0xd3: |
||||
set_fan_speed(setup.b.wValue.w); |
||||
USB_WritePacket(0, 0, 0); |
||||
USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK; |
||||
break; |
||||
case 0xd6: // GET_VERSION
|
||||
USB_WritePacket(gitversion, min(sizeof(gitversion), setup.b.wLength.w), 0); |
||||
USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK; |
||||
break; |
||||
case 0xd8: // RESET
|
||||
NVIC_SystemReset(); |
||||
break; |
||||
default: |
||||
puts("NO HANDLER "); |
||||
puth(setup.b.bRequest); |
||||
puts("\n"); |
||||
break; |
||||
} |
||||
} |
||||
|
||||
|
||||
void OTG_FS_IRQHandler(void) { |
||||
NVIC_DisableIRQ(OTG_FS_IRQn); |
||||
//__disable_irq();
|
||||
usb_irqhandler(); |
||||
//__enable_irq();
|
||||
NVIC_EnableIRQ(OTG_FS_IRQn); |
||||
} |
||||
|
||||
void OTG_HS_IRQHandler(void) { |
||||
//puts("HS_IRQ\n");
|
||||
NVIC_DisableIRQ(OTG_FS_IRQn); |
||||
//__disable_irq();
|
||||
usb_irqhandler(); |
||||
//__enable_irq();
|
||||
NVIC_EnableIRQ(OTG_FS_IRQn); |
||||
} |
||||
|
||||
void ADC_IRQHandler(void) { |
||||
puts("ADC_IRQ\n"); |
||||
} |
||||
|
||||
#ifdef ENABLE_SPI |
||||
|
||||
#define SPI_BUF_SIZE 128 |
||||
uint8_t spi_buf[SPI_BUF_SIZE]; |
||||
int spi_buf_count = 0; |
||||
uint8_t spi_tx_buf[0x10]; |
||||
|
||||
void DMA2_Stream3_IRQHandler(void) { |
||||
#ifdef DEBUG |
||||
puts("DMA2\n"); |
||||
#endif |
||||
DMA2->LIFCR = DMA_LIFCR_CTCIF3; |
||||
|
||||
pop(&can_rx_q, spi_tx_buf); |
||||
spi_tx_dma(spi_tx_buf, 0x10); |
||||
} |
||||
|
||||
void SPI1_IRQHandler(void) { |
||||
// status is 0x43
|
||||
if (SPI1->SR & SPI_SR_RXNE) { |
||||
uint8_t dat = SPI1->DR; |
||||
/*spi_buf[spi_buf_count] = dat;
|
||||
if (spi_buf_count < SPI_BUF_SIZE-1) { |
||||
spi_buf_count += 1; |
||||
}*/ |
||||
} |
||||
|
||||
if (SPI1->SR & SPI_SR_TXE) { |
||||
// all i send is U U U no matter what
|
||||
//SPI1->DR = 'U';
|
||||
} |
||||
|
||||
int stat = SPI1->SR; |
||||
if (stat & ((~SPI_SR_RXNE) & (~SPI_SR_TXE) & (~SPI_SR_BSY))) { |
||||
puts("SPI status: "); |
||||
puth(stat); |
||||
puts("\n"); |
||||
} |
||||
} |
||||
|
||||
#endif |
||||
|
||||
// ***************************** main code *****************************
|
||||
|
||||
void __initialize_hardware_early() { |
||||
// set USB power + and OTG mode
|
||||
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN; |
||||
|
||||
// enable OTG out tied to ground
|
||||
GPIOA->ODR = 0; |
||||
GPIOA->MODER |= GPIO_MODER_MODER1_0; |
||||
|
||||
// enable USB power tied to +
|
||||
GPIOA->ODR |= 1; |
||||
GPIOA->MODER |= GPIO_MODER_MODER0_0; |
||||
|
||||
// enable pull DOWN on OTG_FS_DP
|
||||
// must be done a while before reading it
|
||||
GPIOA->PUPDR = GPIO_PUPDR_PUPDR12_1; |
||||
|
||||
if (enter_bootloader_mode == ENTER_BOOTLOADER_MAGIC) { |
||||
enter_bootloader_mode = 0; |
||||
void (*bootloader)(void) = (void (*)(void)) (*((uint32_t *)0x1fff0004)); |
||||
|
||||
// jump to bootloader
|
||||
bootloader(); |
||||
|
||||
// LOOP
|
||||
while(1); |
||||
} |
||||
} |
||||
|
||||
int main() { |
||||
// init devices
|
||||
clock_init(); |
||||
|
||||
gpio_init(); |
||||
uart_init(); |
||||
usb_init(); |
||||
can_init(CAN1); |
||||
can_init(CAN2); |
||||
adc_init(); |
||||
|
||||
#ifdef ENABLE_SPI |
||||
spi_init(); |
||||
|
||||
// set up DMA
|
||||
memset(spi_tx_buf, 0, 0x10); |
||||
spi_tx_dma(spi_tx_buf, 0x10); |
||||
#endif |
||||
|
||||
// timer for fan PWM
|
||||
#ifdef OLD_BOARD |
||||
TIM3->CCMR2 = TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC4M_1; |
||||
TIM3->CCER = TIM_CCER_CC4E; |
||||
#else |
||||
TIM3->CCMR2 = TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC3M_1; |
||||
TIM3->CCER = TIM_CCER_CC3E; |
||||
#endif |
||||
|
||||
// max value of the timer
|
||||
// 64 makes it above the audible range
|
||||
//TIM3->ARR = 64;
|
||||
|
||||
// 10 prescale makes it below the audible range
|
||||
timer_init(TIM3, 10); |
||||
|
||||
// set PWM
|
||||
set_fan_speed(65535); |
||||
|
||||
puts("**** INTERRUPTS ON ****\n"); |
||||
__disable_irq(); |
||||
NVIC_EnableIRQ(USART2_IRQn); |
||||
NVIC_EnableIRQ(USART3_IRQn); |
||||
NVIC_EnableIRQ(OTG_FS_IRQn); |
||||
NVIC_EnableIRQ(OTG_HS_IRQn); |
||||
NVIC_EnableIRQ(ADC_IRQn); |
||||
// CAN has so many interrupts!
|
||||
|
||||
NVIC_EnableIRQ(CAN1_TX_IRQn); |
||||
NVIC_EnableIRQ(CAN1_RX0_IRQn); |
||||
NVIC_EnableIRQ(CAN1_SCE_IRQn); |
||||
|
||||
NVIC_EnableIRQ(CAN2_TX_IRQn); |
||||
NVIC_EnableIRQ(CAN2_RX0_IRQn); |
||||
NVIC_EnableIRQ(CAN2_SCE_IRQn); |
||||
|
||||
#ifdef ENABLE_SPI |
||||
NVIC_EnableIRQ(DMA2_Stream3_IRQn); |
||||
NVIC_EnableIRQ(SPI1_IRQn); |
||||
#endif |
||||
__enable_irq(); |
||||
|
||||
|
||||
// LED should keep on blinking all the time
|
||||
int cnt; |
||||
for (cnt=0;;cnt++) { |
||||
can_live = pending_can_live; |
||||
|
||||
// reset this every 16th pass
|
||||
if ((cnt&0xF) == 0) pending_can_live = 0; |
||||
|
||||
#ifdef DEBUG |
||||
puts("** blink "); |
||||
puth(can_rx_q.r_ptr); puts(" "); puth(can_rx_q.w_ptr); puts(" "); |
||||
puth(can_tx1_q.r_ptr); puts(" "); puth(can_tx1_q.w_ptr); puts(" "); |
||||
puth(can_tx2_q.r_ptr); puts(" "); puth(can_tx2_q.w_ptr); puts("\n"); |
||||
#endif |
||||
|
||||
/*puts("voltage: "); puth(adc_get(ADCCHAN_VOLTAGE)); puts(" ");
|
||||
puts("current: "); puth(adc_get(ADCCHAN_CURRENT)); puts("\n");*/ |
||||
|
||||
// set LED to be controls allowed
|
||||
GPIOB->ODR = (GPIOB->ODR | (1 << 11)) & ~(controls_allowed << 11); |
||||
|
||||
// blink the other LED if in FS mode
|
||||
if (USBx == USB_OTG_FS) { |
||||
GPIOB->ODR |= (1 << 10); |
||||
} |
||||
delay(1000000); |
||||
GPIOB->ODR &= ~(1 << 10); |
||||
delay(1000000); |
||||
|
||||
#ifdef ENABLE_SPI |
||||
if (spi_buf_count > 0) { |
||||
hexdump(spi_buf, spi_buf_count); |
||||
spi_buf_count = 0; |
||||
} |
||||
#endif |
||||
|
||||
// started logic
|
||||
int started_signal = (GPIOC->IDR & (1 << 13)) != 0; |
||||
if (started_signal) { started_signal_detected = 1; } |
||||
|
||||
if (started_signal || (!started_signal_detected && can_live)) { |
||||
started = 1; |
||||
|
||||
// turn on fan at half speed
|
||||
set_fan_speed(32768); |
||||
} else { |
||||
started = 0; |
||||
|
||||
// turn off fan
|
||||
set_fan_speed(0); |
||||
} |
||||
} |
||||
|
||||
return 0; |
||||
} |
||||
|
@ -1,23 +0,0 @@ |
||||
void spi_init() { |
||||
puts("SPI init\n"); |
||||
SPI1->CR1 = SPI_CR1_SPE; |
||||
SPI1->CR2 = SPI_CR2_RXNEIE | SPI_CR2_ERRIE | SPI_CR2_TXEIE; |
||||
} |
||||
|
||||
void spi_tx_dma(void *addr, int len) { |
||||
// disable DMA
|
||||
SPI1->CR2 &= ~SPI_CR2_TXDMAEN; |
||||
DMA2_Stream3->CR &= ~DMA_SxCR_EN; |
||||
|
||||
// DMA2, stream 3, channel 3
|
||||
DMA2_Stream3->M0AR = addr; |
||||
DMA2_Stream3->NDTR = len; |
||||
DMA2_Stream3->PAR = &(SPI1->DR); |
||||
|
||||
// channel3, increment memory, memory -> periph, enable
|
||||
DMA2_Stream3->CR = DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0 | DMA_SxCR_EN; |
||||
DMA2_Stream3->CR |= DMA_SxCR_TCIE; |
||||
|
||||
SPI1->CR2 |= SPI_CR2_TXDMAEN; |
||||
} |
||||
|
@ -1,511 +0,0 @@ |
||||
/** |
||||
****************************************************************************** |
||||
* @file startup_stm32f205xx.s
|
||||
* @author MCD Application Team
|
||||
* @version V2.0.1
|
||||
* @date 25-March-2014
|
||||
* @brief STM32F205xx Devices vector table for Atollic TrueSTUDIO toolchain.
|
||||
* This module performs: |
||||
* - Set the initial SP |
||||
* - Set the initial PC == Reset_Handler, |
||||
* - Set the vector table entries with the exceptions ISR address |
||||
* - Branches to main in the C library (which eventually |
||||
* calls main()). |
||||
* After Reset the Cortex-M3 processor is in Thread mode, |
||||
* priority is Privileged, and the Stack is set to Main. |
||||
****************************************************************************** |
||||
* @attention
|
||||
* |
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||
* |
||||
* Redistribution and use in source and binary forms, with or without modification, |
||||
* are permitted provided that the following conditions are met: |
||||
* 1. Redistributions of source code must retain the above copyright notice, |
||||
* this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright notice, |
||||
* this list of conditions and the following disclaimer in the documentation |
||||
* and/or other materials provided with the distribution. |
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors |
||||
* may be used to endorse or promote products derived from this software |
||||
* without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m3 |
||||
.thumb |
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section. |
||||
defined in linker script */ |
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */ |
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */ |
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */ |
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */ |
||||
.word _ebss
|
||||
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ |
||||
|
||||
/** |
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely |
||||
* necessary set is performed, after which the application |
||||
* supplied main() routine is called. |
||||
* @param None
|
||||
* @retval : None
|
||||
*/ |
||||
|
||||
.section .text.Reset_Handler |
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function |
||||
Reset_Handler: |
||||
bl __initialize_hardware_early |
||||
ldr sp, =_estack /* set stack pointer */ |
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */ |
||||
movs r1, #0 |
||||
b LoopCopyDataInit |
||||
|
||||
CopyDataInit: |
||||
ldr r3, =_sidata |
||||
ldr r3, [r3, r1] |
||||
str r3, [r0, r1] |
||||
adds r1, r1, #4 |
||||
|
||||
LoopCopyDataInit: |
||||
ldr r0, =_sdata |
||||
ldr r3, =_edata |
||||
adds r2, r0, r1 |
||||
cmp r2, r3 |
||||
bcc CopyDataInit |
||||
ldr r2, =_sbss |
||||
b LoopFillZerobss |
||||
/* Zero fill the bss segment. */ |
||||
FillZerobss: |
||||
movs r3, #0 |
||||
str r3, [r2], #4 |
||||
|
||||
LoopFillZerobss: |
||||
ldr r3, = _ebss |
||||
cmp r2, r3 |
||||
bcc FillZerobss |
||||
|
||||
/* Call the clock system intitialization function.*/ |
||||
/* bl SystemInit */ |
||||
/* Call static constructors */ |
||||
/* bl __libc_init_array */ |
||||
/* Call the application's entry point.*/ |
||||
bl main |
||||
bx lr |
||||
.size Reset_Handler, .-Reset_Handler |
||||
|
||||
/** |
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving |
||||
* the system state for examination by a debugger. |
||||
* @param None
|
||||
* @retval None
|
||||
*/ |
||||
.section .text.Default_Handler,"ax",%progbits |
||||
Default_Handler: |
||||
Infinite_Loop: |
||||
b Infinite_Loop |
||||
.size Default_Handler, .-Default_Handler |
||||
/****************************************************************************** |
||||
* |
||||
* The minimal vector table for a Cortex M3. Note that the proper constructs |
||||
* must be placed on this to ensure that it ends up at physical address |
||||
* 0x0000.0000. |
||||
* |
||||
*******************************************************************************/ |
||||
.section .isr_vector,"a",%progbits |
||||
.type g_pfnVectors, %object |
||||
.size g_pfnVectors, .-g_pfnVectors |
||||
|
||||
|
||||
|
||||
g_pfnVectors: |
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
|
||||
/* External Interrupts */ |
||||
.word WWDG_IRQHandler /* Window WatchDog */ |
||||
.word PVD_IRQHandler /* PVD through EXTI Line detection */ |
||||
.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ |
||||
.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ |
||||
.word FLASH_IRQHandler /* FLASH */ |
||||
.word RCC_IRQHandler /* RCC */ |
||||
.word EXTI0_IRQHandler /* EXTI Line0 */ |
||||
.word EXTI1_IRQHandler /* EXTI Line1 */ |
||||
.word EXTI2_IRQHandler /* EXTI Line2 */ |
||||
.word EXTI3_IRQHandler /* EXTI Line3 */ |
||||
.word EXTI4_IRQHandler /* EXTI Line4 */ |
||||
.word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ |
||||
.word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ |
||||
.word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ |
||||
.word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ |
||||
.word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ |
||||
.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ |
||||
.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ |
||||
.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ |
||||
.word CAN1_TX_IRQHandler /* CAN1 TX */ |
||||
.word CAN1_RX0_IRQHandler /* CAN1 RX0 */ |
||||
.word CAN1_RX1_IRQHandler /* CAN1 RX1 */ |
||||
.word CAN1_SCE_IRQHandler /* CAN1 SCE */ |
||||
.word EXTI9_5_IRQHandler /* External Line[9:5]s */ |
||||
.word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ |
||||
.word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ |
||||
.word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ |
||||
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ |
||||
.word TIM2_IRQHandler /* TIM2 */ |
||||
.word TIM3_IRQHandler /* TIM3 */ |
||||
.word TIM4_IRQHandler /* TIM4 */ |
||||
.word I2C1_EV_IRQHandler /* I2C1 Event */ |
||||
.word I2C1_ER_IRQHandler /* I2C1 Error */ |
||||
.word I2C2_EV_IRQHandler /* I2C2 Event */ |
||||
.word I2C2_ER_IRQHandler /* I2C2 Error */ |
||||
.word SPI1_IRQHandler /* SPI1 */ |
||||
.word SPI2_IRQHandler /* SPI2 */ |
||||
.word USART1_IRQHandler /* USART1 */ |
||||
.word USART2_IRQHandler /* USART2 */ |
||||
.word USART3_IRQHandler /* USART3 */ |
||||
.word EXTI15_10_IRQHandler /* External Line[15:10]s */ |
||||
.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ |
||||
.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ |
||||
.word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ |
||||
.word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ |
||||
.word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ |
||||
.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ |
||||
.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ |
||||
.word FSMC_IRQHandler /* FSMC */ |
||||
.word SDIO_IRQHandler /* SDIO */ |
||||
.word TIM5_IRQHandler /* TIM5 */ |
||||
.word SPI3_IRQHandler /* SPI3 */ |
||||
.word UART4_IRQHandler /* UART4 */ |
||||
.word UART5_IRQHandler /* UART5 */ |
||||
.word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ |
||||
.word TIM7_IRQHandler /* TIM7 */ |
||||
.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ |
||||
.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ |
||||
.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ |
||||
.word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ |
||||
.word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ |
||||
.word 0 /* Reserved */ |
||||
.word 0 /* Reserved */ |
||||
.word CAN2_TX_IRQHandler /* CAN2 TX */ |
||||
.word CAN2_RX0_IRQHandler /* CAN2 RX0 */ |
||||
.word CAN2_RX1_IRQHandler /* CAN2 RX1 */ |
||||
.word CAN2_SCE_IRQHandler /* CAN2 SCE */ |
||||
.word OTG_FS_IRQHandler /* USB OTG FS */ |
||||
.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ |
||||
.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ |
||||
.word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ |
||||
.word USART6_IRQHandler /* USART6 */ |
||||
.word I2C3_EV_IRQHandler /* I2C3 event */ |
||||
.word I2C3_ER_IRQHandler /* I2C3 error */ |
||||
.word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ |
||||
.word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ |
||||
.word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ |
||||
.word OTG_HS_IRQHandler /* USB OTG HS */ |
||||
.word 0 /* Reserved */ |
||||
.word 0 /* Reserved */ |
||||
.word HASH_RNG_IRQHandler /* Hash and Rng */ |
||||
|
||||
/******************************************************************************* |
||||
* |
||||
* Provide weak aliases for each Exception handler to the Default_Handler. |
||||
* As they are weak aliases, any function with the same name will override |
||||
* this definition. |
||||
* |
||||
*******************************************************************************/ |
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler |
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler |
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler |
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler |
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler |
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler |
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler |
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler |
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler |
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler |
||||
|
||||
.weak PVD_IRQHandler
|
||||
.thumb_set PVD_IRQHandler,Default_Handler |
||||
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler |
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler |
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler |
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler |
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler |
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler |
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler |
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler |
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler |
||||
|
||||
.weak DMA1_Stream0_IRQHandler
|
||||
.thumb_set DMA1_Stream0_IRQHandler,Default_Handler |
||||
|
||||
.weak DMA1_Stream1_IRQHandler
|
||||
.thumb_set DMA1_Stream1_IRQHandler,Default_Handler |
||||
|
||||
.weak DMA1_Stream2_IRQHandler
|
||||
.thumb_set DMA1_Stream2_IRQHandler,Default_Handler |
||||
|
||||
.weak DMA1_Stream3_IRQHandler
|
||||
.thumb_set DMA1_Stream3_IRQHandler,Default_Handler |
||||
|
||||
.weak DMA1_Stream4_IRQHandler
|
||||
.thumb_set DMA1_Stream4_IRQHandler,Default_Handler |
||||
|
||||
.weak DMA1_Stream5_IRQHandler
|
||||
.thumb_set DMA1_Stream5_IRQHandler,Default_Handler |
||||
|
||||
.weak DMA1_Stream6_IRQHandler
|
||||
.thumb_set DMA1_Stream6_IRQHandler,Default_Handler |
||||
|
||||
.weak ADC_IRQHandler
|
||||
.thumb_set ADC_IRQHandler,Default_Handler |
||||
|
||||
.weak CAN1_TX_IRQHandler
|
||||
.thumb_set CAN1_TX_IRQHandler,Default_Handler |
||||
|
||||
.weak CAN1_RX0_IRQHandler
|
||||
.thumb_set CAN1_RX0_IRQHandler,Default_Handler |
||||
|
||||
.weak CAN1_RX1_IRQHandler
|
||||
.thumb_set CAN1_RX1_IRQHandler,Default_Handler |
||||
|
||||
.weak CAN1_SCE_IRQHandler
|
||||
.thumb_set CAN1_SCE_IRQHandler,Default_Handler |
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler |
||||
|
||||
.weak TIM1_BRK_TIM9_IRQHandler
|
||||
.thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler |
||||
|
||||
.weak TIM1_UP_TIM10_IRQHandler
|
||||
.thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler |
||||
|
||||
.weak TIM1_TRG_COM_TIM11_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler |
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler |
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler |
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler |
||||
|
||||
.weak TIM4_IRQHandler
|
||||
.thumb_set TIM4_IRQHandler,Default_Handler |
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler |
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler |
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler |
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler |
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler |
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler |
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler |
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler |
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler |
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler |
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler |
||||
|
||||
.weak OTG_FS_WKUP_IRQHandler
|
||||
.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler |
||||
|
||||
.weak TIM8_BRK_TIM12_IRQHandler
|
||||
.thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler |
||||
|
||||
.weak TIM8_UP_TIM13_IRQHandler
|
||||
.thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler |
||||
|
||||
.weak TIM8_TRG_COM_TIM14_IRQHandler
|
||||
.thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler |
||||
|
||||
.weak TIM8_CC_IRQHandler
|
||||
.thumb_set TIM8_CC_IRQHandler,Default_Handler |
||||
|
||||
.weak DMA1_Stream7_IRQHandler
|
||||
.thumb_set DMA1_Stream7_IRQHandler,Default_Handler |
||||
|
||||
.weak FSMC_IRQHandler
|
||||
.thumb_set FSMC_IRQHandler,Default_Handler |
||||
|
||||
.weak SDIO_IRQHandler
|
||||
.thumb_set SDIO_IRQHandler,Default_Handler |
||||
|
||||
.weak TIM5_IRQHandler
|
||||
.thumb_set TIM5_IRQHandler,Default_Handler |
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler |
||||
|
||||
.weak UART4_IRQHandler
|
||||
.thumb_set UART4_IRQHandler,Default_Handler |
||||
|
||||
.weak UART5_IRQHandler
|
||||
.thumb_set UART5_IRQHandler,Default_Handler |
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler,Default_Handler |
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler |
||||
|
||||
.weak DMA2_Stream0_IRQHandler
|
||||
.thumb_set DMA2_Stream0_IRQHandler,Default_Handler |
||||
|
||||
.weak DMA2_Stream1_IRQHandler
|
||||
.thumb_set DMA2_Stream1_IRQHandler,Default_Handler |
||||
|
||||
.weak DMA2_Stream2_IRQHandler
|
||||
.thumb_set DMA2_Stream2_IRQHandler,Default_Handler |
||||
|
||||
.weak DMA2_Stream3_IRQHandler
|
||||
.thumb_set DMA2_Stream3_IRQHandler,Default_Handler |
||||
|
||||
.weak DMA2_Stream4_IRQHandler
|
||||
.thumb_set DMA2_Stream4_IRQHandler,Default_Handler |
||||
|
||||
.weak CAN2_TX_IRQHandler
|
||||
.thumb_set CAN2_TX_IRQHandler,Default_Handler |
||||
|
||||
.weak CAN2_RX0_IRQHandler
|
||||
.thumb_set CAN2_RX0_IRQHandler,Default_Handler |
||||
|
||||
.weak CAN2_RX1_IRQHandler
|
||||
.thumb_set CAN2_RX1_IRQHandler,Default_Handler |
||||
|
||||
.weak CAN2_SCE_IRQHandler
|
||||
.thumb_set CAN2_SCE_IRQHandler,Default_Handler |
||||
|
||||
.weak OTG_FS_IRQHandler
|
||||
.thumb_set OTG_FS_IRQHandler,Default_Handler |
||||
|
||||
.weak DMA2_Stream5_IRQHandler
|
||||
.thumb_set DMA2_Stream5_IRQHandler,Default_Handler |
||||
|
||||
.weak DMA2_Stream6_IRQHandler
|
||||
.thumb_set DMA2_Stream6_IRQHandler,Default_Handler |
||||
|
||||
.weak DMA2_Stream7_IRQHandler
|
||||
.thumb_set DMA2_Stream7_IRQHandler,Default_Handler |
||||
|
||||
.weak USART6_IRQHandler
|
||||
.thumb_set USART6_IRQHandler,Default_Handler |
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler,Default_Handler |
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler,Default_Handler |
||||
|
||||
.weak OTG_HS_EP1_OUT_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler |
||||
|
||||
.weak OTG_HS_EP1_IN_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler |
||||
|
||||
.weak OTG_HS_WKUP_IRQHandler
|
||||
.thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler |
||||
|
||||
.weak OTG_HS_IRQHandler
|
||||
.thumb_set OTG_HS_IRQHandler,Default_Handler |
||||
|
||||
.weak HASH_RNG_IRQHandler
|
||||
.thumb_set HASH_RNG_IRQHandler,Default_Handler |
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
@ -1,163 +0,0 @@ |
||||
/* |
||||
***************************************************************************** |
||||
** |
||||
** File : stm32_flash.ld |
||||
** |
||||
** Abstract : Linker script for STM32F407VG Device with |
||||
** 1024KByte FLASH, 192KByte RAM |
||||
** |
||||
** Set heap size, stack size and stack location according |
||||
** to application requirements. |
||||
** |
||||
** Set memory bank area and size if external memory is used. |
||||
** |
||||
** Target : STMicroelectronics STM32 |
||||
** |
||||
** Environment : Atollic TrueSTUDIO(R) |
||||
** |
||||
** Distribution: The file is distributed “as is,” without any warranty |
||||
** of any kind. |
||||
** |
||||
** (c)Copyright Atollic AB. |
||||
** You may use this file as-is or modify it according to the needs of your |
||||
** project. Distribution of this file (unmodified or modified) is not |
||||
** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the |
||||
** rights to distribute the assembled, compiled & linked contents of this |
||||
** file as part of an application binary file, provided that it is built |
||||
** using the Atollic TrueSTUDIO(R) toolchain. |
||||
** |
||||
***************************************************************************** |
||||
*/ |
||||
|
||||
/* Entry Point */ |
||||
ENTRY(Reset_Handler) |
||||
|
||||
/* Highest address of the user mode stack */ |
||||
_estack = 0x20020000; /* end of 128K RAM on AHB bus*/ |
||||
|
||||
/* Generate a link error if heap and stack don't fit into RAM */ |
||||
_Min_Heap_Size = 0; /* required amount of heap */ |
||||
_Min_Stack_Size = 0x400; /* required amount of stack */ |
||||
|
||||
/* Specify the memory areas */ |
||||
MEMORY |
||||
{ |
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K |
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K |
||||
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K |
||||
} |
||||
|
||||
/* Define output sections */ |
||||
SECTIONS |
||||
{ |
||||
/* The startup code goes first into FLASH */ |
||||
.isr_vector : |
||||
{ |
||||
. = ALIGN(4); |
||||
KEEP(*(.isr_vector)) /* Startup code */ |
||||
. = ALIGN(4); |
||||
} >FLASH |
||||
|
||||
/* The program code and other data goes into FLASH */ |
||||
.text : |
||||
{ |
||||
. = ALIGN(4); |
||||
*(.text) /* .text sections (code) */ |
||||
*(.text*) /* .text* sections (code) */ |
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */ |
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */ |
||||
*(.glue_7) /* glue arm to thumb code */ |
||||
*(.glue_7t) /* glue thumb to arm code */ |
||||
*(.eh_frame) |
||||
|
||||
KEEP (*(.init)) |
||||
KEEP (*(.fini)) |
||||
|
||||
. = ALIGN(4); |
||||
_etext = .; /* define a global symbols at end of code */ |
||||
_exit = .; |
||||
} >FLASH |
||||
|
||||
|
||||
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH |
||||
.ARM : { |
||||
__exidx_start = .; |
||||
*(.ARM.exidx*) |
||||
__exidx_end = .; |
||||
} >FLASH |
||||
|
||||
.preinit_array : |
||||
{ |
||||
PROVIDE_HIDDEN (__preinit_array_start = .); |
||||
KEEP (*(.preinit_array*)) |
||||
PROVIDE_HIDDEN (__preinit_array_end = .); |
||||
} >FLASH |
||||
.init_array : |
||||
{ |
||||
PROVIDE_HIDDEN (__init_array_start = .); |
||||
KEEP (*(SORT(.init_array.*))) |
||||
KEEP (*(.init_array*)) |
||||
PROVIDE_HIDDEN (__init_array_end = .); |
||||
} >FLASH |
||||
.fini_array : |
||||
{ |
||||
PROVIDE_HIDDEN (__fini_array_start = .); |
||||
KEEP (*(.fini_array*)) |
||||
KEEP (*(SORT(.fini_array.*))) |
||||
PROVIDE_HIDDEN (__fini_array_end = .); |
||||
} >FLASH |
||||
|
||||
/* used by the startup to initialize data */ |
||||
_sidata = .; |
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */ |
||||
.data : AT ( _sidata ) |
||||
{ |
||||
. = ALIGN(4); |
||||
_sdata = .; /* create a global symbol at data start */ |
||||
*(.data) /* .data sections */ |
||||
*(.data*) /* .data* sections */ |
||||
|
||||
. = ALIGN(4); |
||||
_edata = .; /* define a global symbol at data end */ |
||||
} >RAM |
||||
|
||||
/* Uninitialized data section */ |
||||
. = ALIGN(4); |
||||
.bss : |
||||
{ |
||||
/* This is used by the startup in order to initialize the .bss secion */ |
||||
_sbss = .; /* define a global symbol at bss start */ |
||||
__bss_start__ = _sbss; |
||||
*(.bss) |
||||
*(.bss*) |
||||
*(COMMON) |
||||
|
||||
. = ALIGN(4); |
||||
_ebss = .; /* define a global symbol at bss end */ |
||||
__bss_end__ = _ebss; |
||||
} >RAM |
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */ |
||||
._user_heap_stack : |
||||
{ |
||||
. = ALIGN(4); |
||||
PROVIDE ( end = . ); |
||||
PROVIDE ( _end = . ); |
||||
. = . + _Min_Heap_Size; |
||||
. = . + _Min_Stack_Size; |
||||
. = ALIGN(4); |
||||
} >RAM |
||||
|
||||
/* MEMORY_bank1 section, code must be located here explicitly */ |
||||
/* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ |
||||
.memory_b1_text : |
||||
{ |
||||
*(.mb1text) /* .mb1text sections (code) */ |
||||
*(.mb1text*) /* .mb1text* sections (code) */ |
||||
*(.mb1rodata) /* read-only data (constants) */ |
||||
*(.mb1rodata*) |
||||
} >MEMORY_B1 |
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) } |
||||
} |
@ -1,7 +0,0 @@ |
||||
void timer_init(TIM_TypeDef *TIM, int psc) { |
||||
TIM->PSC = psc-1; |
||||
TIM->DIER = TIM_DIER_UIE; |
||||
TIM->CR1 = TIM_CR1_CEN; |
||||
TIM->SR = 0; |
||||
} |
||||
|
Binary file not shown.
Binary file not shown.
@ -1,20 +0,0 @@ |
||||
#!/usr/bin/env python |
||||
import usb1 |
||||
import time |
||||
import traceback |
||||
|
||||
if __name__ == "__main__": |
||||
context = usb1.USBContext() |
||||
|
||||
for device in context.getDeviceList(skip_on_error=True): |
||||
if device.getVendorID() == 0xbbaa and device.getProductID()&0xFF00 == 0xdd00: |
||||
print "found device" |
||||
handle = device.open() |
||||
handle.claimInterface(0) |
||||
|
||||
try: |
||||
handle.controlWrite(usb1.TYPE_VENDOR | usb1.RECIPIENT_DEVICE, 0xd1, 0, 0, '') |
||||
except Exception: |
||||
traceback.print_exc() |
||||
print "expected error, exiting cleanly" |
||||
time.sleep(1) |
@ -1,510 +0,0 @@ |
||||
// **** supporting defines ****
|
||||
|
||||
typedef struct |
||||
{ |
||||
__IO uint32_t HPRT; |
||||
} |
||||
USB_OTG_HostPortTypeDef; |
||||
|
||||
#define USBx_HOST ((USB_OTG_HostTypeDef *)((uint32_t)USBx + USB_OTG_HOST_BASE)) |
||||
#define USBx_HOST_PORT ((USB_OTG_HostPortTypeDef *)((uint32_t)USBx + USB_OTG_HOST_PORT_BASE)) |
||||
#define USBx_DEVICE ((USB_OTG_DeviceTypeDef *)((uint32_t)USBx + USB_OTG_DEVICE_BASE)) |
||||
#define USBx_INEP(i) ((USB_OTG_INEndpointTypeDef *)((uint32_t)USBx + USB_OTG_IN_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE)) |
||||
#define USBx_OUTEP(i) ((USB_OTG_OUTEndpointTypeDef *)((uint32_t)USBx + USB_OTG_OUT_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE)) |
||||
#define USBx_DFIFO(i) *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_FIFO_BASE + (i) * USB_OTG_FIFO_SIZE) |
||||
#define USBx_PCGCCTL *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_PCGCCTL_BASE) |
||||
|
||||
#define USB_REQ_GET_STATUS 0x00 |
||||
#define USB_REQ_CLEAR_FEATURE 0x01 |
||||
#define USB_REQ_SET_FEATURE 0x03 |
||||
#define USB_REQ_SET_ADDRESS 0x05 |
||||
#define USB_REQ_GET_DESCRIPTOR 0x06 |
||||
#define USB_REQ_SET_DESCRIPTOR 0x07 |
||||
#define USB_REQ_GET_CONFIGURATION 0x08 |
||||
#define USB_REQ_SET_CONFIGURATION 0x09 |
||||
#define USB_REQ_GET_INTERFACE 0x0A |
||||
#define USB_REQ_SET_INTERFACE 0x0B |
||||
#define USB_REQ_SYNCH_FRAME 0x0C |
||||
|
||||
#define USB_DESC_TYPE_DEVICE 1 |
||||
#define USB_DESC_TYPE_CONFIGURATION 2 |
||||
#define USB_DESC_TYPE_STRING 3 |
||||
#define USB_DESC_TYPE_INTERFACE 4 |
||||
#define USB_DESC_TYPE_ENDPOINT 5 |
||||
#define USB_DESC_TYPE_DEVICE_QUALIFIER 6 |
||||
#define USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION 7 |
||||
|
||||
#define STS_GOUT_NAK 1 |
||||
#define STS_DATA_UPDT 2 |
||||
#define STS_XFER_COMP 3 |
||||
#define STS_SETUP_COMP 4 |
||||
#define STS_SETUP_UPDT 6 |
||||
|
||||
#define USBD_FS_TRDT_VALUE 5 |
||||
|
||||
// interfaces
|
||||
void usb_cb_control_msg(); |
||||
void usb_cb_ep1_in(int len); |
||||
void usb_cb_ep2_out(uint8_t *usbdata, int len); |
||||
void usb_cb_ep3_out(uint8_t *usbdata, int len); |
||||
|
||||
uint8_t device_desc[] = { |
||||
0x12,0x01,0x00,0x01, |
||||
0xFF,0xFF,0xFF,0x40, |
||||
(USB_VID>>0)&0xFF,(USB_VID>>8)&0xFF, |
||||
(USB_PID>>0)&0xFF,(USB_PID>>8)&0xFF, |
||||
0x00,0x22,0x00,0x00, |
||||
0x00,0x01}; |
||||
|
||||
uint8_t configuration_desc[] = { |
||||
0x09, 0x02, 0x27, 0x00, |
||||
0x01, 0x01, 0x00, 0xc0, |
||||
0x32, |
||||
// interface 0
|
||||
0x09, 0x04, 0x00, 0x00, |
||||
0x03, 0xff, 0xFF, 0xFF, |
||||
0x00, |
||||
// endpoint 1, read CAN
|
||||
0x07, 0x05, 0x81, 0x02, 0x40, 0x00, 0x00, |
||||
// endpoint 2, AES load
|
||||
0x07, 0x05, 0x02, 0x02, 0x10, 0x00, 0x00, |
||||
// endpoint 3, send CAN
|
||||
0x07, 0x05, 0x03, 0x02, 0x40, 0x00, 0x00, |
||||
}; |
||||
|
||||
typedef union |
||||
{ |
||||
uint16_t w; |
||||
struct BW |
||||
{ |
||||
uint8_t msb; |
||||
uint8_t lsb; |
||||
} |
||||
bw;
|
||||
} |
||||
uint16_t_uint8_t; |
||||
|
||||
|
||||
typedef union _USB_Setup |
||||
{ |
||||
uint32_t d8[2]; |
||||
|
||||
struct _SetupPkt_Struc |
||||
{ |
||||
uint8_t bmRequestType; |
||||
uint8_t bRequest; |
||||
uint16_t_uint8_t wValue; |
||||
uint16_t_uint8_t wIndex; |
||||
uint16_t_uint8_t wLength; |
||||
} b; |
||||
}
|
||||
USB_Setup_TypeDef;
|
||||
|
||||
// current packet
|
||||
USB_Setup_TypeDef setup; |
||||
uint8_t usbdata[0x100]; |
||||
|
||||
// packet read and write
|
||||
|
||||
void *USB_ReadPacket(void *dest, uint16_t len) { |
||||
uint32_t i=0;
|
||||
uint32_t count32b = (len + 3) / 4;
|
||||
|
||||
for ( i = 0; i < count32b; i++, dest += 4 ) { |
||||
// packed?
|
||||
*(__attribute__((__packed__)) uint32_t *)dest = USBx_DFIFO(0); |
||||
} |
||||
return ((void *)dest); |
||||
} |
||||
|
||||
void USB_WritePacket(const uint8_t *src, uint16_t len, uint32_t ep) { |
||||
#ifdef DEBUG |
||||
puts("writing "); |
||||
hexdump(src, len); |
||||
#endif |
||||
uint32_t count32b = 0, i = 0; |
||||
count32b = (len + 3) / 4;
|
||||
|
||||
// bullshit
|
||||
USBx_INEP(ep)->DIEPTSIZ = (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) | (len & USB_OTG_DIEPTSIZ_XFRSIZ); |
||||
USBx_INEP(ep)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA); |
||||
|
||||
// load the FIFO
|
||||
for (i = 0; i < count32b; i++, src += 4) { |
||||
USBx_DFIFO(ep) = *((__attribute__((__packed__)) uint32_t *)src); |
||||
} |
||||
} |
||||
|
||||
void usb_reset() { |
||||
// unmask endpoint interrupts, so many sets
|
||||
USBx_DEVICE->DAINT = 0xFFFFFFFF; |
||||
USBx_DEVICE->DAINTMSK = 0xFFFFFFFF; |
||||
//USBx_DEVICE->DOEPMSK = (USB_OTG_DOEPMSK_STUPM | USB_OTG_DOEPMSK_XFRCM | USB_OTG_DOEPMSK_EPDM);
|
||||
//USBx_DEVICE->DIEPMSK = (USB_OTG_DIEPMSK_TOM | USB_OTG_DIEPMSK_XFRCM | USB_OTG_DIEPMSK_EPDM | USB_OTG_DIEPMSK_ITTXFEMSK);
|
||||
//USBx_DEVICE->DIEPMSK = (USB_OTG_DIEPMSK_TOM | USB_OTG_DIEPMSK_XFRCM | USB_OTG_DIEPMSK_EPDM);
|
||||
|
||||
// all interrupts for debugging
|
||||
USBx_DEVICE->DIEPMSK = 0xFFFFFFFF; |
||||
USBx_DEVICE->DOEPMSK = 0xFFFFFFFF; |
||||
|
||||
// clear interrupts
|
||||
USBx_INEP(0)->DIEPINT = 0xFF; |
||||
USBx_OUTEP(0)->DOEPINT = 0xFF; |
||||
|
||||
// unset the address
|
||||
USBx_DEVICE->DCFG &= ~USB_OTG_DCFG_DAD; |
||||
|
||||
// set up USB FIFOs
|
||||
// RX start address is fixed to 0
|
||||
USBx->GRXFSIZ = 0x40; |
||||
|
||||
// 0x100 to offset past GRXFSIZ
|
||||
USBx->DIEPTXF0_HNPTXFSIZ = (0x40 << 16) | 0x40; |
||||
|
||||
// EP1, massive
|
||||
USBx->DIEPTXF[0] = (0x40 << 16) | 0x80; |
||||
|
||||
// flush TX fifo
|
||||
USBx->GRSTCTL = USB_OTG_GRSTCTL_TXFFLSH | USB_OTG_GRSTCTL_TXFNUM_4; |
||||
while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH); |
||||
// flush RX FIFO
|
||||
USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH; |
||||
while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH); |
||||
|
||||
// no global NAK
|
||||
USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGINAK; |
||||
|
||||
// ready to receive setup packets
|
||||
USBx_OUTEP(0)->DOEPTSIZ = USB_OTG_DOEPTSIZ_STUPCNT | (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)) | (3 * 8); |
||||
} |
||||
|
||||
void usb_setup() { |
||||
uint8_t resp[0x20]; |
||||
// setup packet is ready
|
||||
switch (setup.b.bRequest) { |
||||
case USB_REQ_SET_CONFIGURATION: |
||||
// enable other endpoints, has to be here?
|
||||
USBx_INEP(1)->DIEPCTL = (0x40 & USB_OTG_DIEPCTL_MPSIZ) | (2 << 18) | (1 << 22) | |
||||
USB_OTG_DIEPCTL_SD0PID_SEVNFRM | USB_OTG_DIEPCTL_USBAEP; |
||||
USBx_INEP(1)->DIEPINT = 0xFF; |
||||
|
||||
USBx_OUTEP(2)->DOEPTSIZ = (1 << 19) | 0x10; |
||||
USBx_OUTEP(2)->DOEPCTL = (0x10 & USB_OTG_DOEPCTL_MPSIZ) | (2 << 18) | |
||||
USB_OTG_DOEPCTL_SD0PID_SEVNFRM | USB_OTG_DOEPCTL_USBAEP; |
||||
USBx_OUTEP(2)->DOEPINT = 0xFF; |
||||
|
||||
USBx_OUTEP(3)->DOEPTSIZ = (1 << 19) | 0x40; |
||||
USBx_OUTEP(3)->DOEPCTL = (0x40 & USB_OTG_DOEPCTL_MPSIZ) | (2 << 18) | |
||||
USB_OTG_DOEPCTL_SD0PID_SEVNFRM | USB_OTG_DOEPCTL_USBAEP; |
||||
USBx_OUTEP(3)->DOEPINT = 0xFF; |
||||
|
||||
// mark ready to receive
|
||||
USBx_OUTEP(2)->DOEPCTL |= USB_OTG_DOEPCTL_EPENA | USB_OTG_DOEPCTL_CNAK; |
||||
USBx_OUTEP(3)->DOEPCTL |= USB_OTG_DOEPCTL_EPENA | USB_OTG_DOEPCTL_CNAK; |
||||
|
||||
USB_WritePacket(0, 0, 0); |
||||
USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK; |
||||
break; |
||||
case USB_REQ_SET_ADDRESS: |
||||
// set now?
|
||||
USBx_DEVICE->DCFG |= ((setup.b.wValue.w & 0x7f) << 4); |
||||
|
||||
#ifdef DEBUG |
||||
puts(" set address\n"); |
||||
#endif |
||||
|
||||
|
||||
USB_WritePacket(0, 0, 0); |
||||
USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK; |
||||
|
||||
break; |
||||
case USB_REQ_GET_DESCRIPTOR: |
||||
switch (setup.b.wValue.bw.lsb) { |
||||
case USB_DESC_TYPE_DEVICE: |
||||
//puts(" writing device descriptor\n");
|
||||
|
||||
// setup transfer
|
||||
USB_WritePacket(device_desc, min(sizeof(device_desc), setup.b.wLength.w), 0); |
||||
USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK; |
||||
|
||||
//puts("D");
|
||||
break; |
||||
case USB_DESC_TYPE_CONFIGURATION: |
||||
USB_WritePacket(configuration_desc, min(sizeof(configuration_desc), setup.b.wLength.w), 0); |
||||
USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK; |
||||
break; |
||||
default: |
||||
// nothing here?
|
||||
USB_WritePacket(0, 0, 0); |
||||
USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK; |
||||
break; |
||||
} |
||||
break; |
||||
case USB_REQ_GET_STATUS: |
||||
// empty resp?
|
||||
resp[0] = 0; |
||||
resp[1] = 0; |
||||
USB_WritePacket((void*)&resp, 2, 0); |
||||
USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK; |
||||
break; |
||||
default: |
||||
usb_cb_control_msg(); |
||||
} |
||||
} |
||||
|
||||
void usb_init() { |
||||
// internal PHY set before reset
|
||||
USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL; |
||||
|
||||
// full speed PHY, do reset and remove power down
|
||||
puth(USBx->GRSTCTL); |
||||
puts(" resetting PHY\n"); |
||||
while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0); |
||||
puts("AHB idle\n"); |
||||
|
||||
// reset PHY here?
|
||||
USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST; |
||||
while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST); |
||||
puts("reset done\n"); |
||||
|
||||
// power up the PHY
|
||||
USBx->GCCFG = USB_OTG_GCCFG_PWRDWN | USB_OTG_GCCFG_NOVBUSSENS; |
||||
|
||||
// be a device, slowest timings
|
||||
//USBx->GUSBCFG = USB_OTG_GUSBCFG_FDMOD | USB_OTG_GUSBCFG_PHYSEL | USB_OTG_GUSBCFG_TRDT | USB_OTG_GUSBCFG_TOCAL;
|
||||
USBx->GUSBCFG = USB_OTG_GUSBCFG_FDMOD | USB_OTG_GUSBCFG_PHYSEL; |
||||
USBx->GUSBCFG |= (uint32_t)((USBD_FS_TRDT_VALUE << 10) & USB_OTG_GUSBCFG_TRDT); |
||||
//USBx->GUSBCFG = USB_OTG_GUSBCFG_PHYSEL | USB_OTG_GUSBCFG_TRDT | USB_OTG_GUSBCFG_TOCAL;
|
||||
|
||||
// **** for debugging, doesn't seem to work ****
|
||||
//USBx->GUSBCFG |= USB_OTG_GUSBCFG_CTXPKT;
|
||||
|
||||
// reset PHY clock
|
||||
USBx_PCGCCTL = 0; |
||||
|
||||
// enable the fancy OTG things
|
||||
USBx->GUSBCFG |= USB_OTG_GUSBCFG_HNPCAP | USB_OTG_GUSBCFG_SRPCAP; |
||||
|
||||
USBx_DEVICE->DCFG = USB_OTG_DCFG_NZLSOHSK | USB_OTG_DCFG_DSPD; |
||||
//USBx_DEVICE->DCFG = USB_OTG_DCFG_DSPD;
|
||||
|
||||
// setup USB interrupts
|
||||
// all interrupts except TXFIFO EMPTY
|
||||
//USBx->GINTMSK = 0xFFFFFFFF & ~(USB_OTG_GINTMSK_NPTXFEM | USB_OTG_GINTMSK_PTXFEM | USB_OTG_GINTSTS_SOF | USB_OTG_GINTSTS_EOPF);
|
||||
USBx->GINTMSK = 0xFFFFFFFF & ~(USB_OTG_GINTMSK_NPTXFEM | USB_OTG_GINTMSK_PTXFEM); |
||||
|
||||
USBx->GAHBCFG = USB_OTG_GAHBCFG_GINT; |
||||
USBx->GINTSTS = 0; |
||||
} |
||||
|
||||
// ***************************** USB port *****************************
|
||||
|
||||
void usb_irqhandler(void) { |
||||
USBx->GINTMSK = 0; |
||||
|
||||
unsigned int gintsts = USBx->GINTSTS; |
||||
|
||||
// gintsts SUSPEND? 04008428
|
||||
#ifdef DEBUG |
||||
unsigned int daint = USBx_DEVICE->DAINT; |
||||
puth(gintsts); |
||||
puts(" ep "); |
||||
puth(daint); |
||||
puts(" USB interrupt!\n"); |
||||
#endif |
||||
|
||||
if (gintsts & USB_OTG_GINTSTS_ESUSP) { |
||||
puts("ESUSP detected\n"); |
||||
} |
||||
|
||||
if (gintsts & USB_OTG_GINTSTS_USBRST) { |
||||
puts("USB reset\n"); |
||||
usb_reset(); |
||||
} |
||||
|
||||
if (gintsts & USB_OTG_GINTSTS_ENUMDNE) { |
||||
puts("enumeration done "); |
||||
// Full speed, ENUMSPD
|
||||
puth(USBx_DEVICE->DSTS); |
||||
puts("\n"); |
||||
} |
||||
|
||||
if (gintsts & USB_OTG_GINTSTS_OTGINT) { |
||||
puts("OTG int:"); |
||||
puth(USBx->GOTGINT); |
||||
puts("\n"); |
||||
|
||||
// getting ADTOCHG
|
||||
USBx->GOTGINT = USBx->GOTGINT; |
||||
} |
||||
|
||||
// RX FIFO first
|
||||
if (gintsts & USB_OTG_GINTSTS_RXFLVL) { |
||||
// 1. Read the Receive status pop register
|
||||
volatile unsigned int rxst = USBx->GRXSTSP; |
||||
|
||||
#ifdef DEBUG |
||||
puts(" RX FIFO:"); |
||||
puth(rxst); |
||||
puts(" status: "); |
||||
puth((rxst & USB_OTG_GRXSTSP_PKTSTS) >> 17); |
||||
puts(" len: "); |
||||
puth((rxst & USB_OTG_GRXSTSP_BCNT) >> 4); |
||||
puts("\n"); |
||||
#endif |
||||
|
||||
|
||||
if (((rxst & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_DATA_UPDT) { |
||||
int endpoint = (rxst & USB_OTG_GRXSTSP_EPNUM); |
||||
int len = (rxst & USB_OTG_GRXSTSP_BCNT) >> 4; |
||||
USB_ReadPacket(&usbdata, len); |
||||
#ifdef DEBUG |
||||
puts(" data "); |
||||
puth(len); |
||||
puts("\n"); |
||||
hexdump(&usbdata, len); |
||||
#endif |
||||
|
||||
if (endpoint == 2) { |
||||
usb_cb_ep2_out(usbdata, len); |
||||
} |
||||
|
||||
if (endpoint == 3) { |
||||
usb_cb_ep3_out(usbdata, len); |
||||
} |
||||
} else if (((rxst & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_SETUP_UPDT) { |
||||
USB_ReadPacket(&setup, 8); |
||||
#ifdef DEBUG |
||||
puts(" setup "); |
||||
hexdump(&setup, 8); |
||||
puts("\n"); |
||||
#endif |
||||
} |
||||
} |
||||
|
||||
if (gintsts & USB_OTG_GINTSTS_HPRTINT) { |
||||
// host
|
||||
puts("HPRT:"); |
||||
puth(USBx_HOST_PORT->HPRT); |
||||
puts("\n"); |
||||
if (USBx_HOST_PORT->HPRT & USB_OTG_HPRT_PCDET) { |
||||
USBx_HOST_PORT->HPRT |= USB_OTG_HPRT_PRST; |
||||
USBx_HOST_PORT->HPRT |= USB_OTG_HPRT_PCDET; |
||||
} |
||||
|
||||
} |
||||
|
||||
if (gintsts & USB_OTG_GINTSTS_BOUTNAKEFF) { |
||||
// no global NAK, why is this getting set?
|
||||
#ifdef DEBUG |
||||
puts("GLOBAL NAK\n"); |
||||
#endif |
||||
USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGONAK | USB_OTG_DCTL_CGINAK; |
||||
} |
||||
|
||||
if (gintsts & USB_OTG_GINTSTS_SRQINT) { |
||||
// we want to do "A-device host negotiation protocol" since we are the A-device
|
||||
puts("start request\n"); |
||||
//USBx->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD;
|
||||
//USBx_HOST_PORT->HPRT = USB_OTG_HPRT_PPWR | USB_OTG_HPRT_PENA;
|
||||
} |
||||
|
||||
// out endpoint hit
|
||||
if (gintsts & USB_OTG_GINTSTS_OEPINT) { |
||||
#ifdef DEBUG |
||||
puts(" 0:"); |
||||
puth(USBx_OUTEP(0)->DOEPINT); |
||||
puts(" 2:"); |
||||
puth(USBx_OUTEP(2)->DOEPINT); |
||||
puts(" 3:"); |
||||
puth(USBx_OUTEP(3)->DOEPINT); |
||||
puts(" "); |
||||
puth(USBx_OUTEP(3)->DOEPCTL); |
||||
puts(" 4:"); |
||||
puth(USBx_OUTEP(4)->DOEPINT); |
||||
puts(" OUT ENDPOINT\n"); |
||||
#endif |
||||
|
||||
if (USBx_OUTEP(2)->DOEPINT & USB_OTG_DOEPINT_XFRC) { |
||||
#ifdef DEBUG |
||||
puts(" OUT2 PACKET XFRC\n");
|
||||
#endif |
||||
USBx_OUTEP(2)->DOEPTSIZ = (1 << 19) | 0x10; |
||||
USBx_OUTEP(2)->DOEPCTL |= USB_OTG_DOEPCTL_EPENA | USB_OTG_DOEPCTL_CNAK; |
||||
} |
||||
|
||||
if (USBx_OUTEP(3)->DOEPINT & USB_OTG_DOEPINT_XFRC) { |
||||
#ifdef DEBUG |
||||
puts(" OUT3 PACKET XFRC\n");
|
||||
#endif |
||||
USBx_OUTEP(3)->DOEPTSIZ = (1 << 19) | 0x40; |
||||
USBx_OUTEP(3)->DOEPCTL |= USB_OTG_DOEPCTL_EPENA | USB_OTG_DOEPCTL_CNAK; |
||||
} else if (USBx_OUTEP(3)->DOEPINT & 0x2000) { |
||||
#ifdef DEBUG |
||||
puts(" OUT3 PACKET WTF\n");
|
||||
#endif |
||||
// if NAK was set trigger this, unknown interrupt
|
||||
USBx_OUTEP(3)->DOEPTSIZ = (1 << 19) | 0x40; |
||||
USBx_OUTEP(3)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK; |
||||
} else if (USBx_OUTEP(3)->DOEPINT) { |
||||
puts("OUTEP3 error "); |
||||
puth(USBx_OUTEP(3)->DOEPINT); |
||||
puts("\n"); |
||||
} |
||||
|
||||
if (USBx_OUTEP(0)->DOEPINT & USB_OTG_DIEPINT_XFRC) { |
||||
// ready for next packet
|
||||
USBx_OUTEP(0)->DOEPTSIZ = USB_OTG_DOEPTSIZ_STUPCNT | (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)) | (1 * 8); |
||||
} |
||||
|
||||
// respond to setup packets
|
||||
if (USBx_OUTEP(0)->DOEPINT & USB_OTG_DOEPINT_STUP) { |
||||
usb_setup(); |
||||
} |
||||
|
||||
USBx_OUTEP(0)->DOEPINT = USBx_OUTEP(0)->DOEPINT; |
||||
USBx_OUTEP(2)->DOEPINT = USBx_OUTEP(2)->DOEPINT; |
||||
USBx_OUTEP(3)->DOEPINT = USBx_OUTEP(3)->DOEPINT; |
||||
} |
||||
|
||||
|
||||
// in endpoint hit
|
||||
if (gintsts & USB_OTG_GINTSTS_IEPINT) { |
||||
#ifdef DEBUG |
||||
puts(" "); |
||||
puth(USBx_INEP(0)->DIEPINT); |
||||
puts(" "); |
||||
puth(USBx_INEP(1)->DIEPINT); |
||||
puts(" IN ENDPOINT\n"); |
||||
#endif |
||||
|
||||
// this happens first
|
||||
if (USBx_INEP(1)->DIEPINT & USB_OTG_DIEPINT_XFRC) { |
||||
#ifdef DEBUG |
||||
puts(" IN PACKET SEND\n");
|
||||
#endif |
||||
//USBx_DEVICE->DIEPEMPMSK = ~(1 << 1);
|
||||
} |
||||
|
||||
// *** IN token received when TxFIFO is empty
|
||||
if (USBx_INEP(1)->DIEPINT & USB_OTG_DIEPMSK_ITTXFEMSK) { |
||||
#ifdef DEBUG |
||||
puts(" IN PACKET QUEUE\n");
|
||||
#endif |
||||
// TODO: always assuming max len, can we get the length?
|
||||
usb_cb_ep1_in(0x40); |
||||
} |
||||
|
||||
// clear interrupts
|
||||
USBx_INEP(0)->DIEPINT = USBx_INEP(0)->DIEPINT; |
||||
USBx_INEP(1)->DIEPINT = USBx_INEP(1)->DIEPINT; |
||||
} |
||||
|
||||
|
||||
// clear all interrupts
|
||||
USBx_DEVICE->DAINT = USBx_DEVICE->DAINT; |
||||
USBx->GINTSTS = USBx->GINTSTS; |
||||
|
||||
USBx->GINTMSK = 0xFFFFFFFF & ~(USB_OTG_GINTMSK_NPTXFEM | USB_OTG_GINTMSK_PTXFEM | USB_OTG_GINTSTS_SOF | USB_OTG_GINTSTS_EOPF); |
||||
} |
||||
|
@ -0,0 +1 @@ |
||||
gen |
@ -0,0 +1,4 @@ |
||||
-include build_from_src.mk |
||||
|
||||
release: |
||||
@echo "cereal: this is a release"
|
@ -0,0 +1,38 @@ |
||||
SRCS := log.capnp car.capnp
|
||||
|
||||
GENS := gen/c/car.capnp.c gen/c/log.capnp.c gen/c/c++.capnp.h gen/c/java.capnp.h \
|
||||
gen/cpp/car.capnp.c++ gen/cpp/log.capnp.c++
|
||||
|
||||
# Dont build java on the phone...
|
||||
UNAME_M := $(shell uname -m)
|
||||
ifeq ($(UNAME_M),x86_64) |
||||
GENS += gen/java/Car.java gen/java/Log.java
|
||||
endif |
||||
|
||||
.PHONY: all |
||||
all: $(GENS) |
||||
|
||||
.PHONY: clean |
||||
clean: |
||||
rm -rf gen
|
||||
|
||||
gen/c/%.capnp.c: %.capnp |
||||
@echo "[ CAPNPC C ] $@"
|
||||
mkdir -p gen/c/
|
||||
capnpc '$<' -o c:gen/c/
|
||||
|
||||
gen/cpp/%.capnp.c++: %.capnp |
||||
@echo "[ CAPNPC C++ ] $@"
|
||||
mkdir -p gen/cpp/
|
||||
capnpc '$<' -o c++:gen/cpp/
|
||||
|
||||
gen/java/Car.java gen/java/Log.java: $(SRCS) |
||||
@echo "[ CAPNPC java ] $@"
|
||||
mkdir -p gen/java/
|
||||
capnpc $^ -o java:gen/java
|
||||
|
||||
# c-capnproto needs some empty headers
|
||||
gen/c/c++.capnp.h gen/c/java.capnp.h: |
||||
mkdir -p gen/c/
|
||||
touch '$@'
|
||||
|
@ -1,337 +0,0 @@ |
||||
#include "car.capnp.h" |
||||
/* AUTO GENERATED - DO NOT EDIT */ |
||||
|
||||
cereal_CarState_ptr cereal_new_CarState(struct capn_segment *s) { |
||||
cereal_CarState_ptr p; |
||||
p.p = capn_new_struct(s, 24, 5); |
||||
return p; |
||||
} |
||||
cereal_CarState_list cereal_new_CarState_list(struct capn_segment *s, int len) { |
||||
cereal_CarState_list p; |
||||
p.p = capn_new_list(s, len, 24, 5); |
||||
return p; |
||||
} |
||||
void cereal_read_CarState(struct cereal_CarState *s, cereal_CarState_ptr p) { |
||||
capn_resolve(&p.p); |
||||
s->errors.p = capn_getp(p.p, 0, 0); |
||||
s->vEgo = capn_to_f32(capn_read32(p.p, 0)); |
||||
s->wheelSpeeds.p = capn_getp(p.p, 1, 0); |
||||
s->gas = capn_to_f32(capn_read32(p.p, 4)); |
||||
s->gasPressed = (capn_read8(p.p, 8) & 1) != 0; |
||||
s->brake = capn_to_f32(capn_read32(p.p, 12)); |
||||
s->brakePressed = (capn_read8(p.p, 8) & 2) != 0; |
||||
s->steeringAngle = capn_to_f32(capn_read32(p.p, 16)); |
||||
s->steeringTorque = capn_to_f32(capn_read32(p.p, 20)); |
||||
s->steeringPressed = (capn_read8(p.p, 8) & 4) != 0; |
||||
s->cruiseState.p = capn_getp(p.p, 2, 0); |
||||
s->buttonEvents.p = capn_getp(p.p, 3, 0); |
||||
s->canMonoTimes.p = capn_getp(p.p, 4, 0); |
||||
} |
||||
void cereal_write_CarState(const struct cereal_CarState *s, cereal_CarState_ptr p) { |
||||
capn_resolve(&p.p); |
||||
capn_setp(p.p, 0, s->errors.p); |
||||
capn_write32(p.p, 0, capn_from_f32(s->vEgo)); |
||||
capn_setp(p.p, 1, s->wheelSpeeds.p); |
||||
capn_write32(p.p, 4, capn_from_f32(s->gas)); |
||||
capn_write1(p.p, 64, s->gasPressed != 0); |
||||
capn_write32(p.p, 12, capn_from_f32(s->brake)); |
||||
capn_write1(p.p, 65, s->brakePressed != 0); |
||||
capn_write32(p.p, 16, capn_from_f32(s->steeringAngle)); |
||||
capn_write32(p.p, 20, capn_from_f32(s->steeringTorque)); |
||||
capn_write1(p.p, 66, s->steeringPressed != 0); |
||||
capn_setp(p.p, 2, s->cruiseState.p); |
||||
capn_setp(p.p, 3, s->buttonEvents.p); |
||||
capn_setp(p.p, 4, s->canMonoTimes.p); |
||||
} |
||||
void cereal_get_CarState(struct cereal_CarState *s, cereal_CarState_list l, int i) { |
||||
cereal_CarState_ptr p; |
||||
p.p = capn_getp(l.p, i, 0); |
||||
cereal_read_CarState(s, p); |
||||
} |
||||
void cereal_set_CarState(const struct cereal_CarState *s, cereal_CarState_list l, int i) { |
||||
cereal_CarState_ptr p; |
||||
p.p = capn_getp(l.p, i, 0); |
||||
cereal_write_CarState(s, p); |
||||
} |
||||
|
||||
cereal_CarState_WheelSpeeds_ptr cereal_new_CarState_WheelSpeeds(struct capn_segment *s) { |
||||
cereal_CarState_WheelSpeeds_ptr p; |
||||
p.p = capn_new_struct(s, 16, 0); |
||||
return p; |
||||
} |
||||
cereal_CarState_WheelSpeeds_list cereal_new_CarState_WheelSpeeds_list(struct capn_segment *s, int len) { |
||||
cereal_CarState_WheelSpeeds_list p; |
||||
p.p = capn_new_list(s, len, 16, 0); |
||||
return p; |
||||
} |
||||
void cereal_read_CarState_WheelSpeeds(struct cereal_CarState_WheelSpeeds *s, cereal_CarState_WheelSpeeds_ptr p) { |
||||
capn_resolve(&p.p); |
||||
s->fl = capn_to_f32(capn_read32(p.p, 0)); |
||||
s->fr = capn_to_f32(capn_read32(p.p, 4)); |
||||
s->rl = capn_to_f32(capn_read32(p.p, 8)); |
||||
s->rr = capn_to_f32(capn_read32(p.p, 12)); |
||||
} |
||||
void cereal_write_CarState_WheelSpeeds(const struct cereal_CarState_WheelSpeeds *s, cereal_CarState_WheelSpeeds_ptr p) { |
||||
capn_resolve(&p.p); |
||||
capn_write32(p.p, 0, capn_from_f32(s->fl)); |
||||
capn_write32(p.p, 4, capn_from_f32(s->fr)); |
||||
capn_write32(p.p, 8, capn_from_f32(s->rl)); |
||||
capn_write32(p.p, 12, capn_from_f32(s->rr)); |
||||
} |
||||
void cereal_get_CarState_WheelSpeeds(struct cereal_CarState_WheelSpeeds *s, cereal_CarState_WheelSpeeds_list l, int i) { |
||||
cereal_CarState_WheelSpeeds_ptr p; |
||||
p.p = capn_getp(l.p, i, 0); |
||||
cereal_read_CarState_WheelSpeeds(s, p); |
||||
} |
||||
void cereal_set_CarState_WheelSpeeds(const struct cereal_CarState_WheelSpeeds *s, cereal_CarState_WheelSpeeds_list l, int i) { |
||||
cereal_CarState_WheelSpeeds_ptr p; |
||||
p.p = capn_getp(l.p, i, 0); |
||||
cereal_write_CarState_WheelSpeeds(s, p); |
||||
} |
||||
|
||||
cereal_CarState_CruiseState_ptr cereal_new_CarState_CruiseState(struct capn_segment *s) { |
||||
cereal_CarState_CruiseState_ptr p; |
||||
p.p = capn_new_struct(s, 8, 0); |
||||
return p; |
||||
} |
||||
cereal_CarState_CruiseState_list cereal_new_CarState_CruiseState_list(struct capn_segment *s, int len) { |
||||
cereal_CarState_CruiseState_list p; |
||||
p.p = capn_new_list(s, len, 8, 0); |
||||
return p; |
||||
} |
||||
void cereal_read_CarState_CruiseState(struct cereal_CarState_CruiseState *s, cereal_CarState_CruiseState_ptr p) { |
||||
capn_resolve(&p.p); |
||||
s->enabled = (capn_read8(p.p, 0) & 1) != 0; |
||||
s->speed = capn_to_f32(capn_read32(p.p, 4)); |
||||
} |
||||
void cereal_write_CarState_CruiseState(const struct cereal_CarState_CruiseState *s, cereal_CarState_CruiseState_ptr p) { |
||||
capn_resolve(&p.p); |
||||
capn_write1(p.p, 0, s->enabled != 0); |
||||
capn_write32(p.p, 4, capn_from_f32(s->speed)); |
||||
} |
||||
void cereal_get_CarState_CruiseState(struct cereal_CarState_CruiseState *s, cereal_CarState_CruiseState_list l, int i) { |
||||
cereal_CarState_CruiseState_ptr p; |
||||
p.p = capn_getp(l.p, i, 0); |
||||
cereal_read_CarState_CruiseState(s, p); |
||||
} |
||||
void cereal_set_CarState_CruiseState(const struct cereal_CarState_CruiseState *s, cereal_CarState_CruiseState_list l, int i) { |
||||
cereal_CarState_CruiseState_ptr p; |
||||
p.p = capn_getp(l.p, i, 0); |
||||
cereal_write_CarState_CruiseState(s, p); |
||||
} |
||||
|
||||
cereal_CarState_ButtonEvent_ptr cereal_new_CarState_ButtonEvent(struct capn_segment *s) { |
||||
cereal_CarState_ButtonEvent_ptr p; |
||||
p.p = capn_new_struct(s, 8, 0); |
||||
return p; |
||||
} |
||||
cereal_CarState_ButtonEvent_list cereal_new_CarState_ButtonEvent_list(struct capn_segment *s, int len) { |
||||
cereal_CarState_ButtonEvent_list p; |
||||
p.p = capn_new_list(s, len, 8, 0); |
||||
return p; |
||||
} |
||||
void cereal_read_CarState_ButtonEvent(struct cereal_CarState_ButtonEvent *s, cereal_CarState_ButtonEvent_ptr p) { |
||||
capn_resolve(&p.p); |
||||
s->pressed = (capn_read8(p.p, 0) & 1) != 0; |
||||
s->type = (enum cereal_CarState_ButtonEvent_Type)(int) capn_read16(p.p, 2); |
||||
} |
||||
void cereal_write_CarState_ButtonEvent(const struct cereal_CarState_ButtonEvent *s, cereal_CarState_ButtonEvent_ptr p) { |
||||
capn_resolve(&p.p); |
||||
capn_write1(p.p, 0, s->pressed != 0); |
||||
capn_write16(p.p, 2, (uint16_t) (s->type)); |
||||
} |
||||
void cereal_get_CarState_ButtonEvent(struct cereal_CarState_ButtonEvent *s, cereal_CarState_ButtonEvent_list l, int i) { |
||||
cereal_CarState_ButtonEvent_ptr p; |
||||
p.p = capn_getp(l.p, i, 0); |
||||
cereal_read_CarState_ButtonEvent(s, p); |
||||
} |
||||
void cereal_set_CarState_ButtonEvent(const struct cereal_CarState_ButtonEvent *s, cereal_CarState_ButtonEvent_list l, int i) { |
||||
cereal_CarState_ButtonEvent_ptr p; |
||||
p.p = capn_getp(l.p, i, 0); |
||||
cereal_write_CarState_ButtonEvent(s, p); |
||||
} |
||||
|
||||
cereal_RadarState_ptr cereal_new_RadarState(struct capn_segment *s) { |
||||
cereal_RadarState_ptr p; |
||||
p.p = capn_new_struct(s, 0, 3); |
||||
return p; |
||||
} |
||||
cereal_RadarState_list cereal_new_RadarState_list(struct capn_segment *s, int len) { |
||||
cereal_RadarState_list p; |
||||
p.p = capn_new_list(s, len, 0, 3); |
||||
return p; |
||||
} |
||||
void cereal_read_RadarState(struct cereal_RadarState *s, cereal_RadarState_ptr p) { |
||||
capn_resolve(&p.p); |
||||
s->errors.p = capn_getp(p.p, 0, 0); |
||||
s->points.p = capn_getp(p.p, 1, 0); |
||||
s->canMonoTimes.p = capn_getp(p.p, 2, 0); |
||||
} |
||||
void cereal_write_RadarState(const struct cereal_RadarState *s, cereal_RadarState_ptr p) { |
||||
capn_resolve(&p.p); |
||||
capn_setp(p.p, 0, s->errors.p); |
||||
capn_setp(p.p, 1, s->points.p); |
||||
capn_setp(p.p, 2, s->canMonoTimes.p); |
||||
} |
||||
void cereal_get_RadarState(struct cereal_RadarState *s, cereal_RadarState_list l, int i) { |
||||
cereal_RadarState_ptr p; |
||||
p.p = capn_getp(l.p, i, 0); |
||||
cereal_read_RadarState(s, p); |
||||
} |
||||
void cereal_set_RadarState(const struct cereal_RadarState *s, cereal_RadarState_list l, int i) { |
||||
cereal_RadarState_ptr p; |
||||
p.p = capn_getp(l.p, i, 0); |
||||
cereal_write_RadarState(s, p); |
||||
} |
||||
|
||||
cereal_RadarState_RadarPoint_ptr cereal_new_RadarState_RadarPoint(struct capn_segment *s) { |
||||
cereal_RadarState_RadarPoint_ptr p; |
||||
p.p = capn_new_struct(s, 32, 0); |
||||
return p; |
||||
} |
||||
cereal_RadarState_RadarPoint_list cereal_new_RadarState_RadarPoint_list(struct capn_segment *s, int len) { |
||||
cereal_RadarState_RadarPoint_list p; |
||||
p.p = capn_new_list(s, len, 32, 0); |
||||
return p; |
||||
} |
||||
void cereal_read_RadarState_RadarPoint(struct cereal_RadarState_RadarPoint *s, cereal_RadarState_RadarPoint_ptr p) { |
||||
capn_resolve(&p.p); |
||||
s->trackId = capn_read64(p.p, 0); |
||||
s->dRel = capn_to_f32(capn_read32(p.p, 8)); |
||||
s->yRel = capn_to_f32(capn_read32(p.p, 12)); |
||||
s->vRel = capn_to_f32(capn_read32(p.p, 16)); |
||||
s->aRel = capn_to_f32(capn_read32(p.p, 20)); |
||||
s->yvRel = capn_to_f32(capn_read32(p.p, 24)); |
||||
} |
||||
void cereal_write_RadarState_RadarPoint(const struct cereal_RadarState_RadarPoint *s, cereal_RadarState_RadarPoint_ptr p) { |
||||
capn_resolve(&p.p); |
||||
capn_write64(p.p, 0, s->trackId); |
||||
capn_write32(p.p, 8, capn_from_f32(s->dRel)); |
||||
capn_write32(p.p, 12, capn_from_f32(s->yRel)); |
||||
capn_write32(p.p, 16, capn_from_f32(s->vRel)); |
||||
capn_write32(p.p, 20, capn_from_f32(s->aRel)); |
||||
capn_write32(p.p, 24, capn_from_f32(s->yvRel)); |
||||
} |
||||
void cereal_get_RadarState_RadarPoint(struct cereal_RadarState_RadarPoint *s, cereal_RadarState_RadarPoint_list l, int i) { |
||||
cereal_RadarState_RadarPoint_ptr p; |
||||
p.p = capn_getp(l.p, i, 0); |
||||
cereal_read_RadarState_RadarPoint(s, p); |
||||
} |
||||
void cereal_set_RadarState_RadarPoint(const struct cereal_RadarState_RadarPoint *s, cereal_RadarState_RadarPoint_list l, int i) { |
||||
cereal_RadarState_RadarPoint_ptr p; |
||||
p.p = capn_getp(l.p, i, 0); |
||||
cereal_write_RadarState_RadarPoint(s, p); |
||||
} |
||||
|
||||
cereal_CarControl_ptr cereal_new_CarControl(struct capn_segment *s) { |
||||
cereal_CarControl_ptr p; |
||||
p.p = capn_new_struct(s, 16, 2); |
||||
return p; |
||||
} |
||||
cereal_CarControl_list cereal_new_CarControl_list(struct capn_segment *s, int len) { |
||||
cereal_CarControl_list p; |
||||
p.p = capn_new_list(s, len, 16, 2); |
||||
return p; |
||||
} |
||||
void cereal_read_CarControl(struct cereal_CarControl *s, cereal_CarControl_ptr p) { |
||||
capn_resolve(&p.p); |
||||
s->enabled = (capn_read8(p.p, 0) & 1) != 0; |
||||
s->gas = capn_to_f32(capn_read32(p.p, 4)); |
||||
s->brake = capn_to_f32(capn_read32(p.p, 8)); |
||||
s->steeringTorque = capn_to_f32(capn_read32(p.p, 12)); |
||||
s->cruiseControl.p = capn_getp(p.p, 0, 0); |
||||
s->hudControl.p = capn_getp(p.p, 1, 0); |
||||
} |
||||
void cereal_write_CarControl(const struct cereal_CarControl *s, cereal_CarControl_ptr p) { |
||||
capn_resolve(&p.p); |
||||
capn_write1(p.p, 0, s->enabled != 0); |
||||
capn_write32(p.p, 4, capn_from_f32(s->gas)); |
||||
capn_write32(p.p, 8, capn_from_f32(s->brake)); |
||||
capn_write32(p.p, 12, capn_from_f32(s->steeringTorque)); |
||||
capn_setp(p.p, 0, s->cruiseControl.p); |
||||
capn_setp(p.p, 1, s->hudControl.p); |
||||
} |
||||
void cereal_get_CarControl(struct cereal_CarControl *s, cereal_CarControl_list l, int i) { |
||||
cereal_CarControl_ptr p; |
||||
p.p = capn_getp(l.p, i, 0); |
||||
cereal_read_CarControl(s, p); |
||||
} |
||||
void cereal_set_CarControl(const struct cereal_CarControl *s, cereal_CarControl_list l, int i) { |
||||
cereal_CarControl_ptr p; |
||||
p.p = capn_getp(l.p, i, 0); |
||||
cereal_write_CarControl(s, p); |
||||
} |
||||
|
||||
cereal_CarControl_CruiseControl_ptr cereal_new_CarControl_CruiseControl(struct capn_segment *s) { |
||||
cereal_CarControl_CruiseControl_ptr p; |
||||
p.p = capn_new_struct(s, 16, 0); |
||||
return p; |
||||
} |
||||
cereal_CarControl_CruiseControl_list cereal_new_CarControl_CruiseControl_list(struct capn_segment *s, int len) { |
||||
cereal_CarControl_CruiseControl_list p; |
||||
p.p = capn_new_list(s, len, 16, 0); |
||||
return p; |
||||
} |
||||
void cereal_read_CarControl_CruiseControl(struct cereal_CarControl_CruiseControl *s, cereal_CarControl_CruiseControl_ptr p) { |
||||
capn_resolve(&p.p); |
||||
s->cancel = (capn_read8(p.p, 0) & 1) != 0; |
||||
s->override = (capn_read8(p.p, 0) & 2) != 0; |
||||
s->speedOverride = capn_to_f32(capn_read32(p.p, 4)); |
||||
s->accelOverride = capn_to_f32(capn_read32(p.p, 8)); |
||||
} |
||||
void cereal_write_CarControl_CruiseControl(const struct cereal_CarControl_CruiseControl *s, cereal_CarControl_CruiseControl_ptr p) { |
||||
capn_resolve(&p.p); |
||||
capn_write1(p.p, 0, s->cancel != 0); |
||||
capn_write1(p.p, 1, s->override != 0); |
||||
capn_write32(p.p, 4, capn_from_f32(s->speedOverride)); |
||||
capn_write32(p.p, 8, capn_from_f32(s->accelOverride)); |
||||
} |
||||
void cereal_get_CarControl_CruiseControl(struct cereal_CarControl_CruiseControl *s, cereal_CarControl_CruiseControl_list l, int i) { |
||||
cereal_CarControl_CruiseControl_ptr p; |
||||
p.p = capn_getp(l.p, i, 0); |
||||
cereal_read_CarControl_CruiseControl(s, p); |
||||
} |
||||
void cereal_set_CarControl_CruiseControl(const struct cereal_CarControl_CruiseControl *s, cereal_CarControl_CruiseControl_list l, int i) { |
||||
cereal_CarControl_CruiseControl_ptr p; |
||||
p.p = capn_getp(l.p, i, 0); |
||||
cereal_write_CarControl_CruiseControl(s, p); |
||||
} |
||||
|
||||
cereal_CarControl_HUDControl_ptr cereal_new_CarControl_HUDControl(struct capn_segment *s) { |
||||
cereal_CarControl_HUDControl_ptr p; |
||||
p.p = capn_new_struct(s, 16, 0); |
||||
return p; |
||||
} |
||||
cereal_CarControl_HUDControl_list cereal_new_CarControl_HUDControl_list(struct capn_segment *s, int len) { |
||||
cereal_CarControl_HUDControl_list p; |
||||
p.p = capn_new_list(s, len, 16, 0); |
||||
return p; |
||||
} |
||||
void cereal_read_CarControl_HUDControl(struct cereal_CarControl_HUDControl *s, cereal_CarControl_HUDControl_ptr p) { |
||||
capn_resolve(&p.p); |
||||
s->speedVisible = (capn_read8(p.p, 0) & 1) != 0; |
||||
s->setSpeed = capn_to_f32(capn_read32(p.p, 4)); |
||||
s->lanesVisible = (capn_read8(p.p, 0) & 2) != 0; |
||||
s->leadVisible = (capn_read8(p.p, 0) & 4) != 0; |
||||
s->visualAlert = (enum cereal_CarControl_HUDControl_VisualAlert)(int) capn_read16(p.p, 2); |
||||
s->audibleAlert = (enum cereal_CarControl_HUDControl_AudibleAlert)(int) capn_read16(p.p, 8); |
||||
} |
||||
void cereal_write_CarControl_HUDControl(const struct cereal_CarControl_HUDControl *s, cereal_CarControl_HUDControl_ptr p) { |
||||
capn_resolve(&p.p); |
||||
capn_write1(p.p, 0, s->speedVisible != 0); |
||||
capn_write32(p.p, 4, capn_from_f32(s->setSpeed)); |
||||
capn_write1(p.p, 1, s->lanesVisible != 0); |
||||
capn_write1(p.p, 2, s->leadVisible != 0); |
||||
capn_write16(p.p, 2, (uint16_t) (s->visualAlert)); |
||||
capn_write16(p.p, 8, (uint16_t) (s->audibleAlert)); |
||||
} |
||||
void cereal_get_CarControl_HUDControl(struct cereal_CarControl_HUDControl *s, cereal_CarControl_HUDControl_list l, int i) { |
||||
cereal_CarControl_HUDControl_ptr p; |
||||
p.p = capn_getp(l.p, i, 0); |
||||
cereal_read_CarControl_HUDControl(s, p); |
||||
} |
||||
void cereal_set_CarControl_HUDControl(const struct cereal_CarControl_HUDControl *s, cereal_CarControl_HUDControl_list l, int i) { |
||||
cereal_CarControl_HUDControl_ptr p; |
||||
p.p = capn_getp(l.p, i, 0); |
||||
cereal_write_CarControl_HUDControl(s, p); |
||||
} |
@ -1,287 +0,0 @@ |
||||
#ifndef CAPN_8E2AF1E78AF8B8D |
||||
#define CAPN_8E2AF1E78AF8B8D |
||||
/* AUTO GENERATED - DO NOT EDIT */ |
||||
#include <capnp_c.h> |
||||
|
||||
#if CAPN_VERSION != 1 |
||||
#error "version mismatch between capnp_c.h and generated code" |
||||
#endif |
||||
|
||||
#include "c++.capnp.h" |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
struct cereal_CarState; |
||||
struct cereal_CarState_WheelSpeeds; |
||||
struct cereal_CarState_CruiseState; |
||||
struct cereal_CarState_ButtonEvent; |
||||
struct cereal_RadarState; |
||||
struct cereal_RadarState_RadarPoint; |
||||
struct cereal_CarControl; |
||||
struct cereal_CarControl_CruiseControl; |
||||
struct cereal_CarControl_HUDControl; |
||||
|
||||
typedef struct {capn_ptr p;} cereal_CarState_ptr; |
||||
typedef struct {capn_ptr p;} cereal_CarState_WheelSpeeds_ptr; |
||||
typedef struct {capn_ptr p;} cereal_CarState_CruiseState_ptr; |
||||
typedef struct {capn_ptr p;} cereal_CarState_ButtonEvent_ptr; |
||||
typedef struct {capn_ptr p;} cereal_RadarState_ptr; |
||||
typedef struct {capn_ptr p;} cereal_RadarState_RadarPoint_ptr; |
||||
typedef struct {capn_ptr p;} cereal_CarControl_ptr; |
||||
typedef struct {capn_ptr p;} cereal_CarControl_CruiseControl_ptr; |
||||
typedef struct {capn_ptr p;} cereal_CarControl_HUDControl_ptr; |
||||
|
||||
typedef struct {capn_ptr p;} cereal_CarState_list; |
||||
typedef struct {capn_ptr p;} cereal_CarState_WheelSpeeds_list; |
||||
typedef struct {capn_ptr p;} cereal_CarState_CruiseState_list; |
||||
typedef struct {capn_ptr p;} cereal_CarState_ButtonEvent_list; |
||||
typedef struct {capn_ptr p;} cereal_RadarState_list; |
||||
typedef struct {capn_ptr p;} cereal_RadarState_RadarPoint_list; |
||||
typedef struct {capn_ptr p;} cereal_CarControl_list; |
||||
typedef struct {capn_ptr p;} cereal_CarControl_CruiseControl_list; |
||||
typedef struct {capn_ptr p;} cereal_CarControl_HUDControl_list; |
||||
|
||||
enum cereal_CarState_Error { |
||||
cereal_CarState_Error_commIssue = 0, |
||||
cereal_CarState_Error_steerUnavailable = 1, |
||||
cereal_CarState_Error_brakeUnavailable = 2, |
||||
cereal_CarState_Error_gasUnavailable = 3, |
||||
cereal_CarState_Error_wrongGear = 4, |
||||
cereal_CarState_Error_doorOpen = 5, |
||||
cereal_CarState_Error_seatbeltNotLatched = 6, |
||||
cereal_CarState_Error_espDisabled = 7, |
||||
cereal_CarState_Error_wrongCarMode = 8, |
||||
cereal_CarState_Error_steerTemporarilyUnavailable = 9, |
||||
cereal_CarState_Error_reverseGear = 10 |
||||
}; |
||||
|
||||
enum cereal_CarState_ButtonEvent_Type { |
||||
cereal_CarState_ButtonEvent_Type_unknown = 0, |
||||
cereal_CarState_ButtonEvent_Type_leftBlinker = 1, |
||||
cereal_CarState_ButtonEvent_Type_rightBlinker = 2, |
||||
cereal_CarState_ButtonEvent_Type_accelCruise = 3, |
||||
cereal_CarState_ButtonEvent_Type_decelCruise = 4, |
||||
cereal_CarState_ButtonEvent_Type_cancel = 5, |
||||
cereal_CarState_ButtonEvent_Type_altButton1 = 6, |
||||
cereal_CarState_ButtonEvent_Type_altButton2 = 7, |
||||
cereal_CarState_ButtonEvent_Type_altButton3 = 8 |
||||
}; |
||||
|
||||
enum cereal_RadarState_Error { |
||||
cereal_RadarState_Error_notValid = 0 |
||||
}; |
||||
|
||||
enum cereal_CarControl_HUDControl_VisualAlert { |
||||
cereal_CarControl_HUDControl_VisualAlert_none = 0, |
||||
cereal_CarControl_HUDControl_VisualAlert_fcw = 1, |
||||
cereal_CarControl_HUDControl_VisualAlert_steerRequired = 2, |
||||
cereal_CarControl_HUDControl_VisualAlert_brakePressed = 3, |
||||
cereal_CarControl_HUDControl_VisualAlert_wrongGear = 4, |
||||
cereal_CarControl_HUDControl_VisualAlert_seatbeltUnbuckled = 5, |
||||
cereal_CarControl_HUDControl_VisualAlert_speedTooHigh = 6 |
||||
}; |
||||
|
||||
enum cereal_CarControl_HUDControl_AudibleAlert { |
||||
cereal_CarControl_HUDControl_AudibleAlert_none = 0, |
||||
cereal_CarControl_HUDControl_AudibleAlert_beepSingle = 1, |
||||
cereal_CarControl_HUDControl_AudibleAlert_beepTriple = 2, |
||||
cereal_CarControl_HUDControl_AudibleAlert_beepRepeated = 3, |
||||
cereal_CarControl_HUDControl_AudibleAlert_chimeSingle = 4, |
||||
cereal_CarControl_HUDControl_AudibleAlert_chimeDouble = 5, |
||||
cereal_CarControl_HUDControl_AudibleAlert_chimeRepeated = 6, |
||||
cereal_CarControl_HUDControl_AudibleAlert_chimeContinuous = 7 |
||||
}; |
||||
|
||||
struct cereal_CarState { |
||||
capn_list16 errors; |
||||
float vEgo; |
||||
cereal_CarState_WheelSpeeds_ptr wheelSpeeds; |
||||
float gas; |
||||
unsigned gasPressed : 1; |
||||
float brake; |
||||
unsigned brakePressed : 1; |
||||
float steeringAngle; |
||||
float steeringTorque; |
||||
unsigned steeringPressed : 1; |
||||
cereal_CarState_CruiseState_ptr cruiseState; |
||||
cereal_CarState_ButtonEvent_list buttonEvents; |
||||
capn_list64 canMonoTimes; |
||||
}; |
||||
|
||||
static const size_t cereal_CarState_word_count = 3; |
||||
|
||||
static const size_t cereal_CarState_pointer_count = 5; |
||||
|
||||
static const size_t cereal_CarState_struct_bytes_count = 64; |
||||
|
||||
struct cereal_CarState_WheelSpeeds { |
||||
float fl; |
||||
float fr; |
||||
float rl; |
||||
float rr; |
||||
}; |
||||
|
||||
static const size_t cereal_CarState_WheelSpeeds_word_count = 2; |
||||
|
||||
static const size_t cereal_CarState_WheelSpeeds_pointer_count = 0; |
||||
|
||||
static const size_t cereal_CarState_WheelSpeeds_struct_bytes_count = 16; |
||||
|
||||
struct cereal_CarState_CruiseState { |
||||
unsigned enabled : 1; |
||||
float speed; |
||||
}; |
||||
|
||||
static const size_t cereal_CarState_CruiseState_word_count = 1; |
||||
|
||||
static const size_t cereal_CarState_CruiseState_pointer_count = 0; |
||||
|
||||
static const size_t cereal_CarState_CruiseState_struct_bytes_count = 8; |
||||
|
||||
struct cereal_CarState_ButtonEvent { |
||||
unsigned pressed : 1; |
||||
enum cereal_CarState_ButtonEvent_Type type; |
||||
}; |
||||
|
||||
static const size_t cereal_CarState_ButtonEvent_word_count = 1; |
||||
|
||||
static const size_t cereal_CarState_ButtonEvent_pointer_count = 0; |
||||
|
||||
static const size_t cereal_CarState_ButtonEvent_struct_bytes_count = 8; |
||||
|
||||
struct cereal_RadarState { |
||||
capn_list16 errors; |
||||
cereal_RadarState_RadarPoint_list points; |
||||
capn_list64 canMonoTimes; |
||||
}; |
||||
|
||||
static const size_t cereal_RadarState_word_count = 0; |
||||
|
||||
static const size_t cereal_RadarState_pointer_count = 3; |
||||
|
||||
static const size_t cereal_RadarState_struct_bytes_count = 24; |
||||
|
||||
struct cereal_RadarState_RadarPoint { |
||||
uint64_t trackId; |
||||
float dRel; |
||||
float yRel; |
||||
float vRel; |
||||
float aRel; |
||||
float yvRel; |
||||
}; |
||||
|
||||
static const size_t cereal_RadarState_RadarPoint_word_count = 4; |
||||
|
||||
static const size_t cereal_RadarState_RadarPoint_pointer_count = 0; |
||||
|
||||
static const size_t cereal_RadarState_RadarPoint_struct_bytes_count = 32; |
||||
|
||||
struct cereal_CarControl { |
||||
unsigned enabled : 1; |
||||
float gas; |
||||
float brake; |
||||
float steeringTorque; |
||||
cereal_CarControl_CruiseControl_ptr cruiseControl; |
||||
cereal_CarControl_HUDControl_ptr hudControl; |
||||
}; |
||||
|
||||
static const size_t cereal_CarControl_word_count = 2; |
||||
|
||||
static const size_t cereal_CarControl_pointer_count = 2; |
||||
|
||||
static const size_t cereal_CarControl_struct_bytes_count = 32; |
||||
|
||||
struct cereal_CarControl_CruiseControl { |
||||
unsigned cancel : 1; |
||||
unsigned override : 1; |
||||
float speedOverride; |
||||
float accelOverride; |
||||
}; |
||||
|
||||
static const size_t cereal_CarControl_CruiseControl_word_count = 2; |
||||
|
||||
static const size_t cereal_CarControl_CruiseControl_pointer_count = 0; |
||||
|
||||
static const size_t cereal_CarControl_CruiseControl_struct_bytes_count = 16; |
||||
|
||||
struct cereal_CarControl_HUDControl { |
||||
unsigned speedVisible : 1; |
||||
float setSpeed; |
||||
unsigned lanesVisible : 1; |
||||
unsigned leadVisible : 1; |
||||
enum cereal_CarControl_HUDControl_VisualAlert visualAlert; |
||||
enum cereal_CarControl_HUDControl_AudibleAlert audibleAlert; |
||||
}; |
||||
|
||||
static const size_t cereal_CarControl_HUDControl_word_count = 2; |
||||
|
||||
static const size_t cereal_CarControl_HUDControl_pointer_count = 0; |
||||
|
||||
static const size_t cereal_CarControl_HUDControl_struct_bytes_count = 16; |
||||
|
||||
cereal_CarState_ptr cereal_new_CarState(struct capn_segment*); |
||||
cereal_CarState_WheelSpeeds_ptr cereal_new_CarState_WheelSpeeds(struct capn_segment*); |
||||
cereal_CarState_CruiseState_ptr cereal_new_CarState_CruiseState(struct capn_segment*); |
||||
cereal_CarState_ButtonEvent_ptr cereal_new_CarState_ButtonEvent(struct capn_segment*); |
||||
cereal_RadarState_ptr cereal_new_RadarState(struct capn_segment*); |
||||
cereal_RadarState_RadarPoint_ptr cereal_new_RadarState_RadarPoint(struct capn_segment*); |
||||
cereal_CarControl_ptr cereal_new_CarControl(struct capn_segment*); |
||||
cereal_CarControl_CruiseControl_ptr cereal_new_CarControl_CruiseControl(struct capn_segment*); |
||||
cereal_CarControl_HUDControl_ptr cereal_new_CarControl_HUDControl(struct capn_segment*); |
||||
|
||||
cereal_CarState_list cereal_new_CarState_list(struct capn_segment*, int len); |
||||
cereal_CarState_WheelSpeeds_list cereal_new_CarState_WheelSpeeds_list(struct capn_segment*, int len); |
||||
cereal_CarState_CruiseState_list cereal_new_CarState_CruiseState_list(struct capn_segment*, int len); |
||||
cereal_CarState_ButtonEvent_list cereal_new_CarState_ButtonEvent_list(struct capn_segment*, int len); |
||||
cereal_RadarState_list cereal_new_RadarState_list(struct capn_segment*, int len); |
||||
cereal_RadarState_RadarPoint_list cereal_new_RadarState_RadarPoint_list(struct capn_segment*, int len); |
||||
cereal_CarControl_list cereal_new_CarControl_list(struct capn_segment*, int len); |
||||
cereal_CarControl_CruiseControl_list cereal_new_CarControl_CruiseControl_list(struct capn_segment*, int len); |
||||
cereal_CarControl_HUDControl_list cereal_new_CarControl_HUDControl_list(struct capn_segment*, int len); |
||||
|
||||
void cereal_read_CarState(struct cereal_CarState*, cereal_CarState_ptr); |
||||
void cereal_read_CarState_WheelSpeeds(struct cereal_CarState_WheelSpeeds*, cereal_CarState_WheelSpeeds_ptr); |
||||
void cereal_read_CarState_CruiseState(struct cereal_CarState_CruiseState*, cereal_CarState_CruiseState_ptr); |
||||
void cereal_read_CarState_ButtonEvent(struct cereal_CarState_ButtonEvent*, cereal_CarState_ButtonEvent_ptr); |
||||
void cereal_read_RadarState(struct cereal_RadarState*, cereal_RadarState_ptr); |
||||
void cereal_read_RadarState_RadarPoint(struct cereal_RadarState_RadarPoint*, cereal_RadarState_RadarPoint_ptr); |
||||
void cereal_read_CarControl(struct cereal_CarControl*, cereal_CarControl_ptr); |
||||
void cereal_read_CarControl_CruiseControl(struct cereal_CarControl_CruiseControl*, cereal_CarControl_CruiseControl_ptr); |
||||
void cereal_read_CarControl_HUDControl(struct cereal_CarControl_HUDControl*, cereal_CarControl_HUDControl_ptr); |
||||
|
||||
void cereal_write_CarState(const struct cereal_CarState*, cereal_CarState_ptr); |
||||
void cereal_write_CarState_WheelSpeeds(const struct cereal_CarState_WheelSpeeds*, cereal_CarState_WheelSpeeds_ptr); |
||||
void cereal_write_CarState_CruiseState(const struct cereal_CarState_CruiseState*, cereal_CarState_CruiseState_ptr); |
||||
void cereal_write_CarState_ButtonEvent(const struct cereal_CarState_ButtonEvent*, cereal_CarState_ButtonEvent_ptr); |
||||
void cereal_write_RadarState(const struct cereal_RadarState*, cereal_RadarState_ptr); |
||||
void cereal_write_RadarState_RadarPoint(const struct cereal_RadarState_RadarPoint*, cereal_RadarState_RadarPoint_ptr); |
||||
void cereal_write_CarControl(const struct cereal_CarControl*, cereal_CarControl_ptr); |
||||
void cereal_write_CarControl_CruiseControl(const struct cereal_CarControl_CruiseControl*, cereal_CarControl_CruiseControl_ptr); |
||||
void cereal_write_CarControl_HUDControl(const struct cereal_CarControl_HUDControl*, cereal_CarControl_HUDControl_ptr); |
||||
|
||||
void cereal_get_CarState(struct cereal_CarState*, cereal_CarState_list, int i); |
||||
void cereal_get_CarState_WheelSpeeds(struct cereal_CarState_WheelSpeeds*, cereal_CarState_WheelSpeeds_list, int i); |
||||
void cereal_get_CarState_CruiseState(struct cereal_CarState_CruiseState*, cereal_CarState_CruiseState_list, int i); |
||||
void cereal_get_CarState_ButtonEvent(struct cereal_CarState_ButtonEvent*, cereal_CarState_ButtonEvent_list, int i); |
||||
void cereal_get_RadarState(struct cereal_RadarState*, cereal_RadarState_list, int i); |
||||
void cereal_get_RadarState_RadarPoint(struct cereal_RadarState_RadarPoint*, cereal_RadarState_RadarPoint_list, int i); |
||||
void cereal_get_CarControl(struct cereal_CarControl*, cereal_CarControl_list, int i); |
||||
void cereal_get_CarControl_CruiseControl(struct cereal_CarControl_CruiseControl*, cereal_CarControl_CruiseControl_list, int i); |
||||
void cereal_get_CarControl_HUDControl(struct cereal_CarControl_HUDControl*, cereal_CarControl_HUDControl_list, int i); |
||||
|
||||
void cereal_set_CarState(const struct cereal_CarState*, cereal_CarState_list, int i); |
||||
void cereal_set_CarState_WheelSpeeds(const struct cereal_CarState_WheelSpeeds*, cereal_CarState_WheelSpeeds_list, int i); |
||||
void cereal_set_CarState_CruiseState(const struct cereal_CarState_CruiseState*, cereal_CarState_CruiseState_list, int i); |
||||
void cereal_set_CarState_ButtonEvent(const struct cereal_CarState_ButtonEvent*, cereal_CarState_ButtonEvent_list, int i); |
||||
void cereal_set_RadarState(const struct cereal_RadarState*, cereal_RadarState_list, int i); |
||||
void cereal_set_RadarState_RadarPoint(const struct cereal_RadarState_RadarPoint*, cereal_RadarState_RadarPoint_list, int i); |
||||
void cereal_set_CarControl(const struct cereal_CarControl*, cereal_CarControl_list, int i); |
||||
void cereal_set_CarControl_CruiseControl(const struct cereal_CarControl_CruiseControl*, cereal_CarControl_CruiseControl_list, int i); |
||||
void cereal_set_CarControl_HUDControl(const struct cereal_CarControl_HUDControl*, cereal_CarControl_HUDControl_list, int i); |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
#endif |
File diff suppressed because it is too large
Load Diff
@ -1,712 +0,0 @@ |
||||
#ifndef CAPN_F3B1F17E25A4285B |
||||
#define CAPN_F3B1F17E25A4285B |
||||
/* AUTO GENERATED - DO NOT EDIT */ |
||||
#include <capnp_c.h> |
||||
|
||||
#if CAPN_VERSION != 1 |
||||
#error "version mismatch between capnp_c.h and generated code" |
||||
#endif |
||||
|
||||
#include "c++.capnp.h" |
||||
#include "car.capnp.h" |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
struct cereal_InitData; |
||||
struct cereal_FrameData; |
||||
struct cereal_GPSNMEAData; |
||||
struct cereal_SensorEventData; |
||||
struct cereal_SensorEventData_SensorVec; |
||||
struct cereal_GpsLocationData; |
||||
struct cereal_CanData; |
||||
struct cereal_ThermalData; |
||||
struct cereal_HealthData; |
||||
struct cereal_LiveUI; |
||||
struct cereal_Live20Data; |
||||
struct cereal_Live20Data_LeadData; |
||||
struct cereal_LiveCalibrationData; |
||||
struct cereal_LiveTracks; |
||||
struct cereal_Live100Data; |
||||
struct cereal_LiveEventData; |
||||
struct cereal_ModelData; |
||||
struct cereal_ModelData_PathData; |
||||
struct cereal_ModelData_LeadData; |
||||
struct cereal_ModelData_ModelSettings; |
||||
struct cereal_CalibrationFeatures; |
||||
struct cereal_EncodeIndex; |
||||
struct cereal_AndroidLogEntry; |
||||
struct cereal_LogRotate; |
||||
struct cereal_Event; |
||||
|
||||
typedef struct {capn_ptr p;} cereal_InitData_ptr; |
||||
typedef struct {capn_ptr p;} cereal_FrameData_ptr; |
||||
typedef struct {capn_ptr p;} cereal_GPSNMEAData_ptr; |
||||
typedef struct {capn_ptr p;} cereal_SensorEventData_ptr; |
||||
typedef struct {capn_ptr p;} cereal_SensorEventData_SensorVec_ptr; |
||||
typedef struct {capn_ptr p;} cereal_GpsLocationData_ptr; |
||||
typedef struct {capn_ptr p;} cereal_CanData_ptr; |
||||
typedef struct {capn_ptr p;} cereal_ThermalData_ptr; |
||||
typedef struct {capn_ptr p;} cereal_HealthData_ptr; |
||||
typedef struct {capn_ptr p;} cereal_LiveUI_ptr; |
||||
typedef struct {capn_ptr p;} cereal_Live20Data_ptr; |
||||
typedef struct {capn_ptr p;} cereal_Live20Data_LeadData_ptr; |
||||
typedef struct {capn_ptr p;} cereal_LiveCalibrationData_ptr; |
||||
typedef struct {capn_ptr p;} cereal_LiveTracks_ptr; |
||||
typedef struct {capn_ptr p;} cereal_Live100Data_ptr; |
||||
typedef struct {capn_ptr p;} cereal_LiveEventData_ptr; |
||||
typedef struct {capn_ptr p;} cereal_ModelData_ptr; |
||||
typedef struct {capn_ptr p;} cereal_ModelData_PathData_ptr; |
||||
typedef struct {capn_ptr p;} cereal_ModelData_LeadData_ptr; |
||||
typedef struct {capn_ptr p;} cereal_ModelData_ModelSettings_ptr; |
||||
typedef struct {capn_ptr p;} cereal_CalibrationFeatures_ptr; |
||||
typedef struct {capn_ptr p;} cereal_EncodeIndex_ptr; |
||||
typedef struct {capn_ptr p;} cereal_AndroidLogEntry_ptr; |
||||
typedef struct {capn_ptr p;} cereal_LogRotate_ptr; |
||||
typedef struct {capn_ptr p;} cereal_Event_ptr; |
||||
|
||||
typedef struct {capn_ptr p;} cereal_InitData_list; |
||||
typedef struct {capn_ptr p;} cereal_FrameData_list; |
||||
typedef struct {capn_ptr p;} cereal_GPSNMEAData_list; |
||||
typedef struct {capn_ptr p;} cereal_SensorEventData_list; |
||||
typedef struct {capn_ptr p;} cereal_SensorEventData_SensorVec_list; |
||||
typedef struct {capn_ptr p;} cereal_GpsLocationData_list; |
||||
typedef struct {capn_ptr p;} cereal_CanData_list; |
||||
typedef struct {capn_ptr p;} cereal_ThermalData_list; |
||||
typedef struct {capn_ptr p;} cereal_HealthData_list; |
||||
typedef struct {capn_ptr p;} cereal_LiveUI_list; |
||||
typedef struct {capn_ptr p;} cereal_Live20Data_list; |
||||
typedef struct {capn_ptr p;} cereal_Live20Data_LeadData_list; |
||||
typedef struct {capn_ptr p;} cereal_LiveCalibrationData_list; |
||||
typedef struct {capn_ptr p;} cereal_LiveTracks_list; |
||||
typedef struct {capn_ptr p;} cereal_Live100Data_list; |
||||
typedef struct {capn_ptr p;} cereal_LiveEventData_list; |
||||
typedef struct {capn_ptr p;} cereal_ModelData_list; |
||||
typedef struct {capn_ptr p;} cereal_ModelData_PathData_list; |
||||
typedef struct {capn_ptr p;} cereal_ModelData_LeadData_list; |
||||
typedef struct {capn_ptr p;} cereal_ModelData_ModelSettings_list; |
||||
typedef struct {capn_ptr p;} cereal_CalibrationFeatures_list; |
||||
typedef struct {capn_ptr p;} cereal_EncodeIndex_list; |
||||
typedef struct {capn_ptr p;} cereal_AndroidLogEntry_list; |
||||
typedef struct {capn_ptr p;} cereal_LogRotate_list; |
||||
typedef struct {capn_ptr p;} cereal_Event_list; |
||||
|
||||
enum cereal_SensorEventData_SensorSource { |
||||
cereal_SensorEventData_SensorSource_android = 0, |
||||
cereal_SensorEventData_SensorSource_iOS = 1, |
||||
cereal_SensorEventData_SensorSource_fiber = 2, |
||||
cereal_SensorEventData_SensorSource_velodyne = 3 |
||||
}; |
||||
|
||||
enum cereal_EncodeIndex_Type { |
||||
cereal_EncodeIndex_Type_bigBoxLossless = 0, |
||||
cereal_EncodeIndex_Type_fullHEVC = 1, |
||||
cereal_EncodeIndex_Type_bigBoxHEVC = 2 |
||||
}; |
||||
extern int32_t cereal_logVersion; |
||||
|
||||
struct cereal_InitData { |
||||
capn_ptr kernelArgs; |
||||
capn_text gctx; |
||||
capn_text dongleId; |
||||
}; |
||||
|
||||
static const size_t cereal_InitData_word_count = 0; |
||||
|
||||
static const size_t cereal_InitData_pointer_count = 3; |
||||
|
||||
static const size_t cereal_InitData_struct_bytes_count = 24; |
||||
|
||||
struct cereal_FrameData { |
||||
uint32_t frameId; |
||||
uint32_t encodeId; |
||||
uint64_t timestampEof; |
||||
int32_t frameLength; |
||||
int32_t integLines; |
||||
int32_t globalGain; |
||||
capn_data image; |
||||
}; |
||||
|
||||
static const size_t cereal_FrameData_word_count = 4; |
||||
|
||||
static const size_t cereal_FrameData_pointer_count = 1; |
||||
|
||||
static const size_t cereal_FrameData_struct_bytes_count = 40; |
||||
|
||||
struct cereal_GPSNMEAData { |
||||
int64_t timestamp; |
||||
uint64_t localWallTime; |
||||
capn_text nmea; |
||||
}; |
||||
|
||||
static const size_t cereal_GPSNMEAData_word_count = 2; |
||||
|
||||
static const size_t cereal_GPSNMEAData_pointer_count = 1; |
||||
|
||||
static const size_t cereal_GPSNMEAData_struct_bytes_count = 24; |
||||
enum cereal_SensorEventData_which { |
||||
cereal_SensorEventData_acceleration = 0, |
||||
cereal_SensorEventData_magnetic = 1, |
||||
cereal_SensorEventData_orientation = 2, |
||||
cereal_SensorEventData_gyro = 3 |
||||
}; |
||||
|
||||
struct cereal_SensorEventData { |
||||
int32_t version; |
||||
int32_t sensor; |
||||
int32_t type; |
||||
int64_t timestamp; |
||||
enum cereal_SensorEventData_which which; |
||||
union { |
||||
cereal_SensorEventData_SensorVec_ptr acceleration; |
||||
cereal_SensorEventData_SensorVec_ptr magnetic; |
||||
cereal_SensorEventData_SensorVec_ptr orientation; |
||||
cereal_SensorEventData_SensorVec_ptr gyro; |
||||
}; |
||||
enum cereal_SensorEventData_SensorSource source; |
||||
}; |
||||
|
||||
static const size_t cereal_SensorEventData_word_count = 3; |
||||
|
||||
static const size_t cereal_SensorEventData_pointer_count = 1; |
||||
|
||||
static const size_t cereal_SensorEventData_struct_bytes_count = 32; |
||||
|
||||
struct cereal_SensorEventData_SensorVec { |
||||
capn_list32 v; |
||||
int8_t status; |
||||
}; |
||||
|
||||
static const size_t cereal_SensorEventData_SensorVec_word_count = 1; |
||||
|
||||
static const size_t cereal_SensorEventData_SensorVec_pointer_count = 1; |
||||
|
||||
static const size_t cereal_SensorEventData_SensorVec_struct_bytes_count = 16; |
||||
|
||||
struct cereal_GpsLocationData { |
||||
uint16_t flags; |
||||
double latitude; |
||||
double longitude; |
||||
double altitude; |
||||
float speed; |
||||
float bearing; |
||||
float accuracy; |
||||
int64_t timestamp; |
||||
}; |
||||
|
||||
static const size_t cereal_GpsLocationData_word_count = 6; |
||||
|
||||
static const size_t cereal_GpsLocationData_pointer_count = 0; |
||||
|
||||
static const size_t cereal_GpsLocationData_struct_bytes_count = 48; |
||||
|
||||
struct cereal_CanData { |
||||
uint32_t address; |
||||
uint16_t busTime; |
||||
capn_data dat; |
||||
int8_t src; |
||||
}; |
||||
|
||||
static const size_t cereal_CanData_word_count = 1; |
||||
|
||||
static const size_t cereal_CanData_pointer_count = 1; |
||||
|
||||
static const size_t cereal_CanData_struct_bytes_count = 16; |
||||
|
||||
struct cereal_ThermalData { |
||||
uint16_t cpu0; |
||||
uint16_t cpu1; |
||||
uint16_t cpu2; |
||||
uint16_t cpu3; |
||||
uint16_t mem; |
||||
uint16_t gpu; |
||||
uint32_t bat; |
||||
float freeSpace; |
||||
int16_t batteryPercent; |
||||
capn_text batteryStatus; |
||||
}; |
||||
|
||||
static const size_t cereal_ThermalData_word_count = 3; |
||||
|
||||
static const size_t cereal_ThermalData_pointer_count = 1; |
||||
|
||||
static const size_t cereal_ThermalData_struct_bytes_count = 32; |
||||
|
||||
struct cereal_HealthData { |
||||
uint32_t voltage; |
||||
uint32_t current; |
||||
unsigned started : 1; |
||||
unsigned controlsAllowed : 1; |
||||
unsigned gasInterceptorDetected : 1; |
||||
unsigned startedSignalDetected : 1; |
||||
}; |
||||
|
||||
static const size_t cereal_HealthData_word_count = 2; |
||||
|
||||
static const size_t cereal_HealthData_pointer_count = 0; |
||||
|
||||
static const size_t cereal_HealthData_struct_bytes_count = 16; |
||||
|
||||
struct cereal_LiveUI { |
||||
unsigned rearViewCam : 1; |
||||
capn_text alertText1; |
||||
capn_text alertText2; |
||||
float awarenessStatus; |
||||
}; |
||||
|
||||
static const size_t cereal_LiveUI_word_count = 1; |
||||
|
||||
static const size_t cereal_LiveUI_pointer_count = 2; |
||||
|
||||
static const size_t cereal_LiveUI_struct_bytes_count = 24; |
||||
|
||||
struct cereal_Live20Data { |
||||
capn_list64 canMonoTimes; |
||||
uint64_t mdMonoTime; |
||||
uint64_t ftMonoTime; |
||||
capn_list32 warpMatrixDEPRECATED; |
||||
float angleOffsetDEPRECATED; |
||||
int8_t calStatusDEPRECATED; |
||||
int32_t calCycleDEPRECATED; |
||||
int8_t calPercDEPRECATED; |
||||
cereal_Live20Data_LeadData_ptr leadOne; |
||||
cereal_Live20Data_LeadData_ptr leadTwo; |
||||
float cumLagMs; |
||||
}; |
||||
|
||||
static const size_t cereal_Live20Data_word_count = 4; |
||||
|
||||
static const size_t cereal_Live20Data_pointer_count = 4; |
||||
|
||||
static const size_t cereal_Live20Data_struct_bytes_count = 64; |
||||
|
||||
struct cereal_Live20Data_LeadData { |
||||
float dRel; |
||||
float yRel; |
||||
float vRel; |
||||
float aRel; |
||||
float vLead; |
||||
float aLead; |
||||
float dPath; |
||||
float vLat; |
||||
float vLeadK; |
||||
float aLeadK; |
||||
unsigned fcw : 1; |
||||
unsigned status : 1; |
||||
}; |
||||
|
||||
static const size_t cereal_Live20Data_LeadData_word_count = 6; |
||||
|
||||
static const size_t cereal_Live20Data_LeadData_pointer_count = 0; |
||||
|
||||
static const size_t cereal_Live20Data_LeadData_struct_bytes_count = 48; |
||||
|
||||
struct cereal_LiveCalibrationData { |
||||
capn_list32 warpMatrix; |
||||
int8_t calStatus; |
||||
int32_t calCycle; |
||||
int8_t calPerc; |
||||
}; |
||||
|
||||
static const size_t cereal_LiveCalibrationData_word_count = 1; |
||||
|
||||
static const size_t cereal_LiveCalibrationData_pointer_count = 1; |
||||
|
||||
static const size_t cereal_LiveCalibrationData_struct_bytes_count = 16; |
||||
|
||||
struct cereal_LiveTracks { |
||||
int32_t trackId; |
||||
float dRel; |
||||
float yRel; |
||||
float vRel; |
||||
float aRel; |
||||
float timeStamp; |
||||
float status; |
||||
float currentTime; |
||||
unsigned stationary : 1; |
||||
unsigned oncoming : 1; |
||||
}; |
||||
|
||||
static const size_t cereal_LiveTracks_word_count = 5; |
||||
|
||||
static const size_t cereal_LiveTracks_pointer_count = 0; |
||||
|
||||
static const size_t cereal_LiveTracks_struct_bytes_count = 40; |
||||
|
||||
struct cereal_Live100Data { |
||||
uint64_t canMonoTime; |
||||
capn_list64 canMonoTimes; |
||||
uint64_t l20MonoTime; |
||||
uint64_t mdMonoTime; |
||||
float vEgo; |
||||
float aEgoDEPRECATED; |
||||
float vPid; |
||||
float vTargetLead; |
||||
float upAccelCmd; |
||||
float uiAccelCmd; |
||||
float yActual; |
||||
float yDes; |
||||
float upSteer; |
||||
float uiSteer; |
||||
float aTargetMin; |
||||
float aTargetMax; |
||||
float jerkFactor; |
||||
float angleSteers; |
||||
int32_t hudLeadDEPRECATED; |
||||
float cumLagMs; |
||||
unsigned enabled : 1; |
||||
unsigned steerOverride : 1; |
||||
float vCruise; |
||||
unsigned rearViewCam : 1; |
||||
capn_text alertText1; |
||||
capn_text alertText2; |
||||
float awarenessStatus; |
||||
}; |
||||
|
||||
static const size_t cereal_Live100Data_word_count = 13; |
||||
|
||||
static const size_t cereal_Live100Data_pointer_count = 3; |
||||
|
||||
static const size_t cereal_Live100Data_struct_bytes_count = 128; |
||||
|
||||
struct cereal_LiveEventData { |
||||
capn_text name; |
||||
int32_t value; |
||||
}; |
||||
|
||||
static const size_t cereal_LiveEventData_word_count = 1; |
||||
|
||||
static const size_t cereal_LiveEventData_pointer_count = 1; |
||||
|
||||
static const size_t cereal_LiveEventData_struct_bytes_count = 16; |
||||
|
||||
struct cereal_ModelData { |
||||
uint32_t frameId; |
||||
cereal_ModelData_PathData_ptr path; |
||||
cereal_ModelData_PathData_ptr leftLane; |
||||
cereal_ModelData_PathData_ptr rightLane; |
||||
cereal_ModelData_LeadData_ptr lead; |
||||
cereal_ModelData_ModelSettings_ptr settings; |
||||
}; |
||||
|
||||
static const size_t cereal_ModelData_word_count = 1; |
||||
|
||||
static const size_t cereal_ModelData_pointer_count = 5; |
||||
|
||||
static const size_t cereal_ModelData_struct_bytes_count = 48; |
||||
|
||||
struct cereal_ModelData_PathData { |
||||
capn_list32 points; |
||||
float prob; |
||||
float std; |
||||
}; |
||||
|
||||
static const size_t cereal_ModelData_PathData_word_count = 1; |
||||
|
||||
static const size_t cereal_ModelData_PathData_pointer_count = 1; |
||||
|
||||
static const size_t cereal_ModelData_PathData_struct_bytes_count = 16; |
||||
|
||||
struct cereal_ModelData_LeadData { |
||||
float dist; |
||||
float prob; |
||||
float std; |
||||
}; |
||||
|
||||
static const size_t cereal_ModelData_LeadData_word_count = 2; |
||||
|
||||
static const size_t cereal_ModelData_LeadData_pointer_count = 0; |
||||
|
||||
static const size_t cereal_ModelData_LeadData_struct_bytes_count = 16; |
||||
|
||||
struct cereal_ModelData_ModelSettings { |
||||
uint16_t bigBoxX; |
||||
uint16_t bigBoxY; |
||||
uint16_t bigBoxWidth; |
||||
uint16_t bigBoxHeight; |
||||
capn_list32 boxProjection; |
||||
capn_list32 yuvCorrection; |
||||
}; |
||||
|
||||
static const size_t cereal_ModelData_ModelSettings_word_count = 1; |
||||
|
||||
static const size_t cereal_ModelData_ModelSettings_pointer_count = 2; |
||||
|
||||
static const size_t cereal_ModelData_ModelSettings_struct_bytes_count = 24; |
||||
|
||||
struct cereal_CalibrationFeatures { |
||||
uint32_t frameId; |
||||
capn_list32 p0; |
||||
capn_list32 p1; |
||||
capn_list8 status; |
||||
}; |
||||
|
||||
static const size_t cereal_CalibrationFeatures_word_count = 1; |
||||
|
||||
static const size_t cereal_CalibrationFeatures_pointer_count = 3; |
||||
|
||||
static const size_t cereal_CalibrationFeatures_struct_bytes_count = 32; |
||||
|
||||
struct cereal_EncodeIndex { |
||||
uint32_t frameId; |
||||
enum cereal_EncodeIndex_Type type; |
||||
uint32_t encodeId; |
||||
int32_t segmentNum; |
||||
uint32_t segmentId; |
||||
}; |
||||
|
||||
static const size_t cereal_EncodeIndex_word_count = 3; |
||||
|
||||
static const size_t cereal_EncodeIndex_pointer_count = 0; |
||||
|
||||
static const size_t cereal_EncodeIndex_struct_bytes_count = 24; |
||||
|
||||
struct cereal_AndroidLogEntry { |
||||
uint8_t id; |
||||
uint64_t ts; |
||||
uint8_t priority; |
||||
int32_t pid; |
||||
int32_t tid; |
||||
capn_text tag; |
||||
capn_text message; |
||||
}; |
||||
|
||||
static const size_t cereal_AndroidLogEntry_word_count = 3; |
||||
|
||||
static const size_t cereal_AndroidLogEntry_pointer_count = 2; |
||||
|
||||
static const size_t cereal_AndroidLogEntry_struct_bytes_count = 40; |
||||
|
||||
struct cereal_LogRotate { |
||||
int32_t segmentNum; |
||||
capn_text path; |
||||
}; |
||||
|
||||
static const size_t cereal_LogRotate_word_count = 1; |
||||
|
||||
static const size_t cereal_LogRotate_pointer_count = 1; |
||||
|
||||
static const size_t cereal_LogRotate_struct_bytes_count = 16; |
||||
enum cereal_Event_which { |
||||
cereal_Event_initData = 0, |
||||
cereal_Event_frame = 1, |
||||
cereal_Event_gpsNMEA = 2, |
||||
cereal_Event_sensorEventDEPRECATED = 3, |
||||
cereal_Event_can = 4, |
||||
cereal_Event_thermal = 5, |
||||
cereal_Event_live100 = 6, |
||||
cereal_Event_liveEventDEPRECATED = 7, |
||||
cereal_Event_model = 8, |
||||
cereal_Event_features = 9, |
||||
cereal_Event_sensorEvents = 10, |
||||
cereal_Event_health = 11, |
||||
cereal_Event_live20 = 12, |
||||
cereal_Event_liveUIDEPRECATED = 13, |
||||
cereal_Event_encodeIdx = 14, |
||||
cereal_Event_liveTracks = 15, |
||||
cereal_Event_sendcan = 16, |
||||
cereal_Event_logMessage = 17, |
||||
cereal_Event_liveCalibration = 18, |
||||
cereal_Event_androidLogEntry = 19, |
||||
cereal_Event_gpsLocation = 20, |
||||
cereal_Event_carState = 21, |
||||
cereal_Event_carControl = 22 |
||||
}; |
||||
|
||||
struct cereal_Event { |
||||
uint64_t logMonoTime; |
||||
enum cereal_Event_which which; |
||||
union { |
||||
cereal_InitData_ptr initData; |
||||
cereal_FrameData_ptr frame; |
||||
cereal_GPSNMEAData_ptr gpsNMEA; |
||||
cereal_SensorEventData_ptr sensorEventDEPRECATED; |
||||
cereal_CanData_list can; |
||||
cereal_ThermalData_ptr thermal; |
||||
cereal_Live100Data_ptr live100; |
||||
cereal_LiveEventData_list liveEventDEPRECATED; |
||||
cereal_ModelData_ptr model; |
||||
cereal_CalibrationFeatures_ptr features; |
||||
cereal_SensorEventData_list sensorEvents; |
||||
cereal_HealthData_ptr health; |
||||
cereal_Live20Data_ptr live20; |
||||
cereal_LiveUI_ptr liveUIDEPRECATED; |
||||
cereal_EncodeIndex_ptr encodeIdx; |
||||
cereal_LiveTracks_list liveTracks; |
||||
cereal_CanData_list sendcan; |
||||
capn_text logMessage; |
||||
cereal_LiveCalibrationData_ptr liveCalibration; |
||||
cereal_AndroidLogEntry_ptr androidLogEntry; |
||||
cereal_GpsLocationData_ptr gpsLocation; |
||||
cereal_CarState_ptr carState; |
||||
cereal_CarControl_ptr carControl; |
||||
}; |
||||
}; |
||||
|
||||
static const size_t cereal_Event_word_count = 2; |
||||
|
||||
static const size_t cereal_Event_pointer_count = 1; |
||||
|
||||
static const size_t cereal_Event_struct_bytes_count = 24; |
||||
|
||||
cereal_InitData_ptr cereal_new_InitData(struct capn_segment*); |
||||
cereal_FrameData_ptr cereal_new_FrameData(struct capn_segment*); |
||||
cereal_GPSNMEAData_ptr cereal_new_GPSNMEAData(struct capn_segment*); |
||||
cereal_SensorEventData_ptr cereal_new_SensorEventData(struct capn_segment*); |
||||
cereal_SensorEventData_SensorVec_ptr cereal_new_SensorEventData_SensorVec(struct capn_segment*); |
||||
cereal_GpsLocationData_ptr cereal_new_GpsLocationData(struct capn_segment*); |
||||
cereal_CanData_ptr cereal_new_CanData(struct capn_segment*); |
||||
cereal_ThermalData_ptr cereal_new_ThermalData(struct capn_segment*); |
||||
cereal_HealthData_ptr cereal_new_HealthData(struct capn_segment*); |
||||
cereal_LiveUI_ptr cereal_new_LiveUI(struct capn_segment*); |
||||
cereal_Live20Data_ptr cereal_new_Live20Data(struct capn_segment*); |
||||
cereal_Live20Data_LeadData_ptr cereal_new_Live20Data_LeadData(struct capn_segment*); |
||||
cereal_LiveCalibrationData_ptr cereal_new_LiveCalibrationData(struct capn_segment*); |
||||
cereal_LiveTracks_ptr cereal_new_LiveTracks(struct capn_segment*); |
||||
cereal_Live100Data_ptr cereal_new_Live100Data(struct capn_segment*); |
||||
cereal_LiveEventData_ptr cereal_new_LiveEventData(struct capn_segment*); |
||||
cereal_ModelData_ptr cereal_new_ModelData(struct capn_segment*); |
||||
cereal_ModelData_PathData_ptr cereal_new_ModelData_PathData(struct capn_segment*); |
||||
cereal_ModelData_LeadData_ptr cereal_new_ModelData_LeadData(struct capn_segment*); |
||||
cereal_ModelData_ModelSettings_ptr cereal_new_ModelData_ModelSettings(struct capn_segment*); |
||||
cereal_CalibrationFeatures_ptr cereal_new_CalibrationFeatures(struct capn_segment*); |
||||
cereal_EncodeIndex_ptr cereal_new_EncodeIndex(struct capn_segment*); |
||||
cereal_AndroidLogEntry_ptr cereal_new_AndroidLogEntry(struct capn_segment*); |
||||
cereal_LogRotate_ptr cereal_new_LogRotate(struct capn_segment*); |
||||
cereal_Event_ptr cereal_new_Event(struct capn_segment*); |
||||
|
||||
cereal_InitData_list cereal_new_InitData_list(struct capn_segment*, int len); |
||||
cereal_FrameData_list cereal_new_FrameData_list(struct capn_segment*, int len); |
||||
cereal_GPSNMEAData_list cereal_new_GPSNMEAData_list(struct capn_segment*, int len); |
||||
cereal_SensorEventData_list cereal_new_SensorEventData_list(struct capn_segment*, int len); |
||||
cereal_SensorEventData_SensorVec_list cereal_new_SensorEventData_SensorVec_list(struct capn_segment*, int len); |
||||
cereal_GpsLocationData_list cereal_new_GpsLocationData_list(struct capn_segment*, int len); |
||||
cereal_CanData_list cereal_new_CanData_list(struct capn_segment*, int len); |
||||
cereal_ThermalData_list cereal_new_ThermalData_list(struct capn_segment*, int len); |
||||
cereal_HealthData_list cereal_new_HealthData_list(struct capn_segment*, int len); |
||||
cereal_LiveUI_list cereal_new_LiveUI_list(struct capn_segment*, int len); |
||||
cereal_Live20Data_list cereal_new_Live20Data_list(struct capn_segment*, int len); |
||||
cereal_Live20Data_LeadData_list cereal_new_Live20Data_LeadData_list(struct capn_segment*, int len); |
||||
cereal_LiveCalibrationData_list cereal_new_LiveCalibrationData_list(struct capn_segment*, int len); |
||||
cereal_LiveTracks_list cereal_new_LiveTracks_list(struct capn_segment*, int len); |
||||
cereal_Live100Data_list cereal_new_Live100Data_list(struct capn_segment*, int len); |
||||
cereal_LiveEventData_list cereal_new_LiveEventData_list(struct capn_segment*, int len); |
||||
cereal_ModelData_list cereal_new_ModelData_list(struct capn_segment*, int len); |
||||
cereal_ModelData_PathData_list cereal_new_ModelData_PathData_list(struct capn_segment*, int len); |
||||
cereal_ModelData_LeadData_list cereal_new_ModelData_LeadData_list(struct capn_segment*, int len); |
||||
cereal_ModelData_ModelSettings_list cereal_new_ModelData_ModelSettings_list(struct capn_segment*, int len); |
||||
cereal_CalibrationFeatures_list cereal_new_CalibrationFeatures_list(struct capn_segment*, int len); |
||||
cereal_EncodeIndex_list cereal_new_EncodeIndex_list(struct capn_segment*, int len); |
||||
cereal_AndroidLogEntry_list cereal_new_AndroidLogEntry_list(struct capn_segment*, int len); |
||||
cereal_LogRotate_list cereal_new_LogRotate_list(struct capn_segment*, int len); |
||||
cereal_Event_list cereal_new_Event_list(struct capn_segment*, int len); |
||||
|
||||
void cereal_read_InitData(struct cereal_InitData*, cereal_InitData_ptr); |
||||
void cereal_read_FrameData(struct cereal_FrameData*, cereal_FrameData_ptr); |
||||
void cereal_read_GPSNMEAData(struct cereal_GPSNMEAData*, cereal_GPSNMEAData_ptr); |
||||
void cereal_read_SensorEventData(struct cereal_SensorEventData*, cereal_SensorEventData_ptr); |
||||
void cereal_read_SensorEventData_SensorVec(struct cereal_SensorEventData_SensorVec*, cereal_SensorEventData_SensorVec_ptr); |
||||
void cereal_read_GpsLocationData(struct cereal_GpsLocationData*, cereal_GpsLocationData_ptr); |
||||
void cereal_read_CanData(struct cereal_CanData*, cereal_CanData_ptr); |
||||
void cereal_read_ThermalData(struct cereal_ThermalData*, cereal_ThermalData_ptr); |
||||
void cereal_read_HealthData(struct cereal_HealthData*, cereal_HealthData_ptr); |
||||
void cereal_read_LiveUI(struct cereal_LiveUI*, cereal_LiveUI_ptr); |
||||
void cereal_read_Live20Data(struct cereal_Live20Data*, cereal_Live20Data_ptr); |
||||
void cereal_read_Live20Data_LeadData(struct cereal_Live20Data_LeadData*, cereal_Live20Data_LeadData_ptr); |
||||
void cereal_read_LiveCalibrationData(struct cereal_LiveCalibrationData*, cereal_LiveCalibrationData_ptr); |
||||
void cereal_read_LiveTracks(struct cereal_LiveTracks*, cereal_LiveTracks_ptr); |
||||
void cereal_read_Live100Data(struct cereal_Live100Data*, cereal_Live100Data_ptr); |
||||
void cereal_read_LiveEventData(struct cereal_LiveEventData*, cereal_LiveEventData_ptr); |
||||
void cereal_read_ModelData(struct cereal_ModelData*, cereal_ModelData_ptr); |
||||
void cereal_read_ModelData_PathData(struct cereal_ModelData_PathData*, cereal_ModelData_PathData_ptr); |
||||
void cereal_read_ModelData_LeadData(struct cereal_ModelData_LeadData*, cereal_ModelData_LeadData_ptr); |
||||
void cereal_read_ModelData_ModelSettings(struct cereal_ModelData_ModelSettings*, cereal_ModelData_ModelSettings_ptr); |
||||
void cereal_read_CalibrationFeatures(struct cereal_CalibrationFeatures*, cereal_CalibrationFeatures_ptr); |
||||
void cereal_read_EncodeIndex(struct cereal_EncodeIndex*, cereal_EncodeIndex_ptr); |
||||
void cereal_read_AndroidLogEntry(struct cereal_AndroidLogEntry*, cereal_AndroidLogEntry_ptr); |
||||
void cereal_read_LogRotate(struct cereal_LogRotate*, cereal_LogRotate_ptr); |
||||
void cereal_read_Event(struct cereal_Event*, cereal_Event_ptr); |
||||
|
||||
void cereal_write_InitData(const struct cereal_InitData*, cereal_InitData_ptr); |
||||
void cereal_write_FrameData(const struct cereal_FrameData*, cereal_FrameData_ptr); |
||||
void cereal_write_GPSNMEAData(const struct cereal_GPSNMEAData*, cereal_GPSNMEAData_ptr); |
||||
void cereal_write_SensorEventData(const struct cereal_SensorEventData*, cereal_SensorEventData_ptr); |
||||
void cereal_write_SensorEventData_SensorVec(const struct cereal_SensorEventData_SensorVec*, cereal_SensorEventData_SensorVec_ptr); |
||||
void cereal_write_GpsLocationData(const struct cereal_GpsLocationData*, cereal_GpsLocationData_ptr); |
||||
void cereal_write_CanData(const struct cereal_CanData*, cereal_CanData_ptr); |
||||
void cereal_write_ThermalData(const struct cereal_ThermalData*, cereal_ThermalData_ptr); |
||||
void cereal_write_HealthData(const struct cereal_HealthData*, cereal_HealthData_ptr); |
||||
void cereal_write_LiveUI(const struct cereal_LiveUI*, cereal_LiveUI_ptr); |
||||
void cereal_write_Live20Data(const struct cereal_Live20Data*, cereal_Live20Data_ptr); |
||||
void cereal_write_Live20Data_LeadData(const struct cereal_Live20Data_LeadData*, cereal_Live20Data_LeadData_ptr); |
||||
void cereal_write_LiveCalibrationData(const struct cereal_LiveCalibrationData*, cereal_LiveCalibrationData_ptr); |
||||
void cereal_write_LiveTracks(const struct cereal_LiveTracks*, cereal_LiveTracks_ptr); |
||||
void cereal_write_Live100Data(const struct cereal_Live100Data*, cereal_Live100Data_ptr); |
||||
void cereal_write_LiveEventData(const struct cereal_LiveEventData*, cereal_LiveEventData_ptr); |
||||
void cereal_write_ModelData(const struct cereal_ModelData*, cereal_ModelData_ptr); |
||||
void cereal_write_ModelData_PathData(const struct cereal_ModelData_PathData*, cereal_ModelData_PathData_ptr); |
||||
void cereal_write_ModelData_LeadData(const struct cereal_ModelData_LeadData*, cereal_ModelData_LeadData_ptr); |
||||
void cereal_write_ModelData_ModelSettings(const struct cereal_ModelData_ModelSettings*, cereal_ModelData_ModelSettings_ptr); |
||||
void cereal_write_CalibrationFeatures(const struct cereal_CalibrationFeatures*, cereal_CalibrationFeatures_ptr); |
||||
void cereal_write_EncodeIndex(const struct cereal_EncodeIndex*, cereal_EncodeIndex_ptr); |
||||
void cereal_write_AndroidLogEntry(const struct cereal_AndroidLogEntry*, cereal_AndroidLogEntry_ptr); |
||||
void cereal_write_LogRotate(const struct cereal_LogRotate*, cereal_LogRotate_ptr); |
||||
void cereal_write_Event(const struct cereal_Event*, cereal_Event_ptr); |
||||
|
||||
void cereal_get_InitData(struct cereal_InitData*, cereal_InitData_list, int i); |
||||
void cereal_get_FrameData(struct cereal_FrameData*, cereal_FrameData_list, int i); |
||||
void cereal_get_GPSNMEAData(struct cereal_GPSNMEAData*, cereal_GPSNMEAData_list, int i); |
||||
void cereal_get_SensorEventData(struct cereal_SensorEventData*, cereal_SensorEventData_list, int i); |
||||
void cereal_get_SensorEventData_SensorVec(struct cereal_SensorEventData_SensorVec*, cereal_SensorEventData_SensorVec_list, int i); |
||||
void cereal_get_GpsLocationData(struct cereal_GpsLocationData*, cereal_GpsLocationData_list, int i); |
||||
void cereal_get_CanData(struct cereal_CanData*, cereal_CanData_list, int i); |
||||
void cereal_get_ThermalData(struct cereal_ThermalData*, cereal_ThermalData_list, int i); |
||||
void cereal_get_HealthData(struct cereal_HealthData*, cereal_HealthData_list, int i); |
||||
void cereal_get_LiveUI(struct cereal_LiveUI*, cereal_LiveUI_list, int i); |
||||
void cereal_get_Live20Data(struct cereal_Live20Data*, cereal_Live20Data_list, int i); |
||||
void cereal_get_Live20Data_LeadData(struct cereal_Live20Data_LeadData*, cereal_Live20Data_LeadData_list, int i); |
||||
void cereal_get_LiveCalibrationData(struct cereal_LiveCalibrationData*, cereal_LiveCalibrationData_list, int i); |
||||
void cereal_get_LiveTracks(struct cereal_LiveTracks*, cereal_LiveTracks_list, int i); |
||||
void cereal_get_Live100Data(struct cereal_Live100Data*, cereal_Live100Data_list, int i); |
||||
void cereal_get_LiveEventData(struct cereal_LiveEventData*, cereal_LiveEventData_list, int i); |
||||
void cereal_get_ModelData(struct cereal_ModelData*, cereal_ModelData_list, int i); |
||||
void cereal_get_ModelData_PathData(struct cereal_ModelData_PathData*, cereal_ModelData_PathData_list, int i); |
||||
void cereal_get_ModelData_LeadData(struct cereal_ModelData_LeadData*, cereal_ModelData_LeadData_list, int i); |
||||
void cereal_get_ModelData_ModelSettings(struct cereal_ModelData_ModelSettings*, cereal_ModelData_ModelSettings_list, int i); |
||||
void cereal_get_CalibrationFeatures(struct cereal_CalibrationFeatures*, cereal_CalibrationFeatures_list, int i); |
||||
void cereal_get_EncodeIndex(struct cereal_EncodeIndex*, cereal_EncodeIndex_list, int i); |
||||
void cereal_get_AndroidLogEntry(struct cereal_AndroidLogEntry*, cereal_AndroidLogEntry_list, int i); |
||||
void cereal_get_LogRotate(struct cereal_LogRotate*, cereal_LogRotate_list, int i); |
||||
void cereal_get_Event(struct cereal_Event*, cereal_Event_list, int i); |
||||
|
||||
void cereal_set_InitData(const struct cereal_InitData*, cereal_InitData_list, int i); |
||||
void cereal_set_FrameData(const struct cereal_FrameData*, cereal_FrameData_list, int i); |
||||
void cereal_set_GPSNMEAData(const struct cereal_GPSNMEAData*, cereal_GPSNMEAData_list, int i); |
||||
void cereal_set_SensorEventData(const struct cereal_SensorEventData*, cereal_SensorEventData_list, int i); |
||||
void cereal_set_SensorEventData_SensorVec(const struct cereal_SensorEventData_SensorVec*, cereal_SensorEventData_SensorVec_list, int i); |
||||
void cereal_set_GpsLocationData(const struct cereal_GpsLocationData*, cereal_GpsLocationData_list, int i); |
||||
void cereal_set_CanData(const struct cereal_CanData*, cereal_CanData_list, int i); |
||||
void cereal_set_ThermalData(const struct cereal_ThermalData*, cereal_ThermalData_list, int i); |
||||
void cereal_set_HealthData(const struct cereal_HealthData*, cereal_HealthData_list, int i); |
||||
void cereal_set_LiveUI(const struct cereal_LiveUI*, cereal_LiveUI_list, int i); |
||||
void cereal_set_Live20Data(const struct cereal_Live20Data*, cereal_Live20Data_list, int i); |
||||
void cereal_set_Live20Data_LeadData(const struct cereal_Live20Data_LeadData*, cereal_Live20Data_LeadData_list, int i); |
||||
void cereal_set_LiveCalibrationData(const struct cereal_LiveCalibrationData*, cereal_LiveCalibrationData_list, int i); |
||||
void cereal_set_LiveTracks(const struct cereal_LiveTracks*, cereal_LiveTracks_list, int i); |
||||
void cereal_set_Live100Data(const struct cereal_Live100Data*, cereal_Live100Data_list, int i); |
||||
void cereal_set_LiveEventData(const struct cereal_LiveEventData*, cereal_LiveEventData_list, int i); |
||||
void cereal_set_ModelData(const struct cereal_ModelData*, cereal_ModelData_list, int i); |
||||
void cereal_set_ModelData_PathData(const struct cereal_ModelData_PathData*, cereal_ModelData_PathData_list, int i); |
||||
void cereal_set_ModelData_LeadData(const struct cereal_ModelData_LeadData*, cereal_ModelData_LeadData_list, int i); |
||||
void cereal_set_ModelData_ModelSettings(const struct cereal_ModelData_ModelSettings*, cereal_ModelData_ModelSettings_list, int i); |
||||
void cereal_set_CalibrationFeatures(const struct cereal_CalibrationFeatures*, cereal_CalibrationFeatures_list, int i); |
||||
void cereal_set_EncodeIndex(const struct cereal_EncodeIndex*, cereal_EncodeIndex_list, int i); |
||||
void cereal_set_AndroidLogEntry(const struct cereal_AndroidLogEntry*, cereal_AndroidLogEntry_list, int i); |
||||
void cereal_set_LogRotate(const struct cereal_LogRotate*, cereal_LogRotate_list, int i); |
||||
void cereal_set_Event(const struct cereal_Event*, cereal_Event_list, int i); |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
#endif |
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,28 @@ |
||||
# Copyright (c) 2013-2015 Sandstorm Development Group, Inc. and contributors |
||||
# Licensed under the MIT License: |
||||
# |
||||
# Permission is hereby granted, free of charge, to any person obtaining a copy |
||||
# of this software and associated documentation files (the "Software"), to deal |
||||
# in the Software without restriction, including without limitation the rights |
||||
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
||||
# copies of the Software, and to permit persons to whom the Software is |
||||
# furnished to do so, subject to the following conditions: |
||||
# |
||||
# The above copyright notice and this permission notice shall be included in |
||||
# all copies or substantial portions of the Software. |
||||
# |
||||
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
||||
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
||||
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
||||
# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
||||
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
||||
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
||||
# THE SOFTWARE. |
||||
|
||||
@0xc5f1af96651f70ea; |
||||
|
||||
annotation package @0x9ee4c8f803b3b596 (file) : Text; |
||||
# Name of the package, such as "org.example.foo", in which the generated code will reside. |
||||
|
||||
annotation outerClassname @0x9b066bb4881f7cd3 (file) : Text; |
||||
# Name of the outer class that will wrap the generated code. |
@ -1,17 +0,0 @@ |
||||
"""Classes for filtering discrete time signals.""" |
||||
import numpy as np |
||||
|
||||
|
||||
class FirstOrderLowpassFilter(object): |
||||
def __init__(self, fc, dt, x1=0): |
||||
self.kf = 2 * np.pi * fc * dt / (1 + 2 * np.pi * fc * dt) |
||||
self.x1 = x1 |
||||
|
||||
def __call__(self, x): |
||||
self.x1 = (1 - self.kf) * self.x1 + self.kf * x |
||||
|
||||
# If previous or current is NaN, reset filter. |
||||
if np.isnan(self.x1): |
||||
self.x1 = x |
||||
|
||||
return self.x1 |
@ -0,0 +1,128 @@ |
||||
|
||||
_FINGERPRINTS = { |
||||
"ACURA ILX 2016 ACURAWATCH PLUS": { |
||||
1024L: 5, 513L: 5, 1027L: 5, 1029L: 8, 929L: 4, 1057L: 5, 777L: 8, 1034L: 5, 1036L: 8, 398L: 3, 399L: 7, 145L: 8, 660L: 8, 985L: 3, 923L: 2, 542L: 7, 773L: 7, 800L: 8, 432L: 7, 419L: 8, 420L: 8, 1030L: 5, 422L: 8, 808L: 8, 428L: 8, 304L: 8, 819L: 7, 821L: 5, 57L: 3, 316L: 8, 545L: 4, 464L: 8, 1108L: 8, 597L: 8, 342L: 6, 983L: 8, 344L: 8, 804L: 8, 1039L: 8, 476L: 4, 892L: 8, 490L: 8, 1064L: 7, 882L: 2, 884L: 7, 887L: 8, 888L: 8, 380L: 8, 1365L: 5, |
||||
# sent messages |
||||
0xe4: 5, 0x1fa: 8, 0x200: 3, 0x30c: 8, 0x33d: 5, |
||||
}, |
||||
"HONDA CIVIC 2016 TOURING": { |
||||
1024L: 5, 513L: 5, 1027L: 5, 1029L: 8, 777L: 8, 1036L: 8, 1039L: 8, 1424L: 5, 401L: 8, 148L: 8, 662L: 4, 985L: 3, 795L: 8, 773L: 7, 800L: 8, 545L: 6, 420L: 8, 806L: 8, 808L: 8, 1322L: 5, 427L: 3, 428L: 8, 304L: 8, 432L: 7, 57L: 3, 450L: 8, 929L: 8, 330L: 8, 1302L: 8, 464L: 8, 1361L: 5, 1108L: 8, 597L: 8, 470L: 2, 344L: 8, 804L: 8, 399L: 7, 476L: 7, 1633L: 8, 487L: 4, 892L: 8, 490L: 8, 493L: 5, 884L: 8, 891L: 8, 380L: 8, 1365L: 5, |
||||
# sent messages |
||||
0xe4: 5, 0x1fa: 8, 0x200: 3, 0x30c: 8, 0x33d: 5, 0x35e: 8, 0x39f: 8, |
||||
}, |
||||
"HONDA ACCORD 2016 TOURING": { |
||||
1024L: 5, 929L: 8, 1027L: 5, 773L: 7, 1601L: 8, 777L: 8, 1036L: 8, 398L: 3, 1039L: 8, 401L: 8, 145L: 8, 1424L: 5, 660L: 8, 661L: 4, 918L: 7, 985L: 3, 923L: 2, 542L: 7, 927L: 8, 800L: 8, 545L: 4, 420L: 8, 422L: 8, 808L: 8, 426L: 8, 1029L: 8, 432L: 7, 57L: 3, 316L: 8, 829L: 5, 1600L: 5, 1089L: 8, 1057L: 5, 780L: 8, 1088L: 8, 464L: 8, 1108L: 8, 597L: 8, 342L: 6, 983L: 8, 344L: 8, 804L: 8, 476L: 4, 1296L: 3, 891L: 8, 1125L: 8, 487L: 4, 892L: 8, 490L: 8, 871L: 8, 1064L: 7, 882L: 2, 884L: 8, 506L: 8, 507L: 1, 380L: 8, 1365L: 5 |
||||
} |
||||
} |
||||
|
||||
def eliminate_incompatible_cars(msg, candidate_cars): |
||||
"""Removes cars that could not have sent msg. |
||||
|
||||
Inputs: |
||||
msg: A cereal/log CanData message from the car. |
||||
candidate_cars: A list of cars to consider. |
||||
|
||||
Returns: |
||||
A list containing the subset of candidate_cars that could have sent msg. |
||||
""" |
||||
compatible_cars = [] |
||||
for car_name in candidate_cars: |
||||
adr = msg.address |
||||
if msg.src != 0 or (adr in _FINGERPRINTS[car_name] and |
||||
_FINGERPRINTS[car_name][adr] == len(msg.dat)): |
||||
compatible_cars.append(car_name) |
||||
else: |
||||
pass |
||||
#isin = adr in _FINGERPRINTS[car_name] |
||||
#print "eliminate", car_name, hex(adr), isin, len(msg.dat), msg.dat.encode("hex") |
||||
return compatible_cars |
||||
|
||||
def all_known_cars(): |
||||
"""Returns a list of all known car strings.""" |
||||
return _FINGERPRINTS.keys() |
||||
|
||||
# **** for use live only **** |
||||
def fingerprint(logcan): |
||||
import selfdrive.messaging as messaging |
||||
from cereal import car |
||||
from common.realtime import sec_since_boot |
||||
import os |
||||
if os.getenv("SIMULATOR") is not None or logcan is None: |
||||
# send message |
||||
ret = car.CarParams.new_message() |
||||
|
||||
ret.carName = "simulator" |
||||
ret.radarName = "nidec" |
||||
ret.carFingerprint = "THE LOW QUALITY SIMULATOR" |
||||
|
||||
ret.enableSteer = True |
||||
ret.enableBrake = True |
||||
ret.enableGas = True |
||||
ret.enableCruise = False |
||||
|
||||
ret.wheelBase = 2.67 |
||||
ret.steerRatio = 15.3 |
||||
ret.slipFactor = 0.0014 |
||||
|
||||
ret.steerKp, ret.steerKi = 12.0, 1.0 |
||||
return ret |
||||
|
||||
print "waiting for fingerprint..." |
||||
brake_only = True |
||||
|
||||
candidate_cars = all_known_cars() |
||||
finger = {} |
||||
st = None |
||||
while 1: |
||||
for a in messaging.drain_sock(logcan, wait_for_one=True): |
||||
if st is None: |
||||
st = sec_since_boot() |
||||
for can in a.can: |
||||
# pedal |
||||
if can.address == 0x201 and can.src == 0: |
||||
brake_only = False |
||||
if can.src == 0: |
||||
finger[can.address] = len(can.dat) |
||||
candidate_cars = eliminate_incompatible_cars(can, candidate_cars) |
||||
|
||||
# if we only have one car choice and it's been 100ms since we got our first message, exit |
||||
if len(candidate_cars) == 1 and st is not None and (sec_since_boot()-st) > 0.1: |
||||
break |
||||
elif len(candidate_cars) == 0: |
||||
print map(hex, finger.keys()) |
||||
raise Exception("car doesn't match any fingerprints") |
||||
|
||||
print "fingerprinted", candidate_cars[0] |
||||
|
||||
# send message |
||||
ret = car.CarParams.new_message() |
||||
|
||||
ret.carName = "honda" |
||||
ret.radarName = "nidec" |
||||
ret.carFingerprint = candidate_cars[0] |
||||
|
||||
ret.enableSteer = True |
||||
ret.enableBrake = True |
||||
ret.enableGas = not brake_only |
||||
ret.enableCruise = brake_only |
||||
#ret.enableCruise = False |
||||
|
||||
ret.wheelBase = 2.67 |
||||
ret.steerRatio = 15.3 |
||||
ret.slipFactor = 0.0014 |
||||
|
||||
if candidate_cars[0] == "HONDA CIVIC 2016 TOURING": |
||||
ret.steerKp, ret.steerKi = 12.0, 1.0 |
||||
elif candidate_cars[0] == "ACURA ILX 2016 ACURAWATCH PLUS": |
||||
if not brake_only: |
||||
# assuming if we have an interceptor we also have a torque mod |
||||
ret.steerKp, ret.steerKi = 6.0, 0.5 |
||||
else: |
||||
ret.steerKp, ret.steerKi = 12.0, 1.0 |
||||
elif candidate_cars[0] == "HONDA ACCORD 2016 TOURING": |
||||
ret.steerKp, ret.steerKi = 12.0, 1.0 |
||||
else: |
||||
raise ValueError("unsupported car %s" % candidate_cars[0]) |
||||
|
||||
return ret |
||||
|
@ -0,0 +1,285 @@ |
||||
#!/usr/bin/env python |
||||
"""ROS has a parameter server, we have files. |
||||
|
||||
The parameter store is a persistent key value store, implemented as a directory with a writer lock. |
||||
On Android, we store params under params_dir = /data/params. The writer lock is a file |
||||
"<params_dir>/.lock" taken using flock(), and data is stored in a directory symlinked to by |
||||
"<params_dir>/d". |
||||
|
||||
Each key, value pair is stored as a file with named <key> with contents <value>, located in |
||||
<params_dir>/d/<key> |
||||
|
||||
Readers of a single key can just open("<params_dir>/d/<key>") and read the file contents. |
||||
Readers who want a consistent snapshot of multiple keys should take the lock. |
||||
|
||||
Writers should take the lock before modifying anything. Writers should also leave the DB in a |
||||
consistent state after a crash. The implementation below does this by copying all params to a temp |
||||
directory <params_dir>/<tmp>, then atomically symlinking <params_dir>/<d> to <params_dir>/<tmp> |
||||
before deleting the old <params_dir>/<d> directory. |
||||
|
||||
Writers that only modify a single key can simply take the lock, then swap the corresponding value |
||||
file in place without messing with <params_dir>/d. |
||||
""" |
||||
import time |
||||
import os |
||||
import errno |
||||
import sys |
||||
import shutil |
||||
import fcntl |
||||
import tempfile |
||||
from enum import Enum |
||||
|
||||
def mkdirs_exists_ok(path): |
||||
try: |
||||
os.makedirs(path) |
||||
except OSError: |
||||
if not os.path.isdir(path): |
||||
raise |
||||
|
||||
class TxType(Enum): |
||||
PERSISTANT = 1 |
||||
CLEAR_ON_MANAGER_START = 2 |
||||
CLEAR_ON_CAR_START = 3 |
||||
|
||||
class UnknownKeyName(Exception): |
||||
pass |
||||
|
||||
keys = { |
||||
# written: manager |
||||
# read: loggerd, uploaderd, baseui |
||||
"DongleId": TxType.PERSISTANT, |
||||
"AccessToken": TxType.PERSISTANT, |
||||
"Version": TxType.PERSISTANT, |
||||
"GitCommit": TxType.PERSISTANT, |
||||
"GitBranch": TxType.PERSISTANT, |
||||
# written: visiond |
||||
# read: visiond |
||||
"CalibrationParams": TxType.PERSISTANT, |
||||
# written: visiond |
||||
# read: visiond, ui |
||||
"CloudCalibration": TxType.PERSISTANT, |
||||
# written: controlsd |
||||
# read: radard |
||||
"CarParams": TxType.CLEAR_ON_CAR_START} |
||||
|
||||
|
||||
class FileLock(object): |
||||
def __init__(self, path, create): |
||||
self._path = path |
||||
self._create = create |
||||
self._fd = None |
||||
|
||||
def acquire(self): |
||||
self._fd = os.open(self._path, os.O_CREAT if self._create else 0) |
||||
fcntl.flock(self._fd, fcntl.LOCK_EX) |
||||
|
||||
def release(self): |
||||
if self._fd is not None: |
||||
os.close(self._fd) |
||||
self._fd = None |
||||
|
||||
|
||||
class DBAccessor(object): |
||||
def __init__(self, path): |
||||
self._path = path |
||||
self._vals = None |
||||
|
||||
def keys(self): |
||||
self._check_entered() |
||||
return self._vals.keys() |
||||
|
||||
def get(self, key): |
||||
self._check_entered() |
||||
try: |
||||
return self._vals[key] |
||||
except KeyError: |
||||
return None |
||||
|
||||
def _get_lock(self, create): |
||||
lock = FileLock(os.path.join(self._path, ".lock"), create) |
||||
lock.acquire() |
||||
return lock |
||||
|
||||
def _read_values_locked(self): |
||||
"""Callers should hold a lock while calling this method.""" |
||||
vals = {} |
||||
try: |
||||
data_path = self._data_path() |
||||
keys = os.listdir(data_path) |
||||
for key in keys: |
||||
with open(os.path.join(data_path, key), "rb") as f: |
||||
vals[key] = f.read() |
||||
except (OSError, IOError) as e: |
||||
# Either the DB hasn't been created yet, or somebody wrote a bug and left the DB in an |
||||
# inconsistent state. Either way, return empty. |
||||
if e.errno == errno.ENOENT: |
||||
return {} |
||||
|
||||
return vals |
||||
|
||||
def _data_path(self): |
||||
return os.path.join(self._path, "d") |
||||
|
||||
def _check_entered(self): |
||||
if self._vals is None: |
||||
raise Exception("Must call __enter__ before using DB") |
||||
|
||||
|
||||
class DBReader(DBAccessor): |
||||
def __enter__(self): |
||||
try: |
||||
lock = self._get_lock(False) |
||||
except OSError as e: |
||||
# Do not create lock if it does not exist. |
||||
if e.errno == errno.ENOENT: |
||||
self._vals = {} |
||||
return self |
||||
|
||||
try: |
||||
# Read everything. |
||||
self._vals = self._read_values_locked() |
||||
return self |
||||
finally: |
||||
lock.release() |
||||
|
||||
def __exit__(self, type, value, traceback): pass |
||||
|
||||
|
||||
class DBWriter(DBAccessor): |
||||
def __init__(self, path): |
||||
super(DBWriter, self).__init__(path) |
||||
self._lock = None |
||||
self._prev_umask = None |
||||
|
||||
def put(self, key, value): |
||||
self._vals[key] = value |
||||
|
||||
def delete(self, key): |
||||
self._vals.pop(key, None) |
||||
|
||||
def __enter__(self): |
||||
mkdirs_exists_ok(self._path) |
||||
|
||||
# Make sure we can write and that permissions are correct. |
||||
self._prev_umask = os.umask(0) |
||||
|
||||
try: |
||||
os.chmod(self._path, 0o777) |
||||
self._lock = self._get_lock(True) |
||||
self._vals = self._read_values_locked() |
||||
except: |
||||
os.umask(self._prev_umask) |
||||
self._prev_umask = None |
||||
raise |
||||
|
||||
return self |
||||
|
||||
def __exit__(self, type, value, traceback): |
||||
self._check_entered() |
||||
|
||||
try: |
||||
old_data_path = None |
||||
new_data_path = None |
||||
tempdir_path = tempfile.mkdtemp(prefix=".tmp", dir=self._path) |
||||
try: |
||||
# Write back all keys. |
||||
os.chmod(tempdir_path, 0o777) |
||||
for k, v in self._vals.items(): |
||||
with open(os.path.join(tempdir_path, k), "wb") as f: |
||||
f.write(v) |
||||
|
||||
data_path = self._data_path() |
||||
try: |
||||
old_data_path = os.path.join(self._path, os.readlink(data_path)) |
||||
except (OSError, IOError) as e: |
||||
# NOTE(mgraczyk): If other DB implementations have bugs, this could cause |
||||
# copies to be left behind, but we still want to overwrite. |
||||
pass |
||||
|
||||
new_data_path = "{}.link".format(tempdir_path) |
||||
os.symlink(os.path.basename(tempdir_path), new_data_path) |
||||
os.rename(new_data_path, data_path) |
||||
# TODO(mgraczyk): raise useful error when values are bad. |
||||
except: |
||||
shutil.rmtree(tempdir_path) |
||||
if new_data_path is not None: |
||||
os.remove(new_data_path) |
||||
raise |
||||
|
||||
# Keep holding the lock while we clean up the old data. |
||||
if old_data_path is not None: |
||||
shutil.rmtree(old_data_path) |
||||
finally: |
||||
os.umask(self._prev_umask) |
||||
self._prev_umask = None |
||||
|
||||
# Always release the lock. |
||||
self._lock.release() |
||||
self._lock = None |
||||
|
||||
|
||||
|
||||
class JSDB(object): |
||||
def __init__(self, fn): |
||||
self._fn = fn |
||||
|
||||
def begin(self, write=False): |
||||
if write: |
||||
return DBWriter(self._fn) |
||||
else: |
||||
return DBReader(self._fn) |
||||
|
||||
class Params(object): |
||||
def __init__(self, db='/data/params'): |
||||
self.env = JSDB(db) |
||||
|
||||
def _clear_keys_with_type(self, tx_type): |
||||
with self.env.begin(write=True) as txn: |
||||
for key in keys: |
||||
if keys[key] == tx_type: |
||||
txn.delete(key) |
||||
|
||||
def manager_start(self): |
||||
self._clear_keys_with_type(TxType.CLEAR_ON_MANAGER_START) |
||||
|
||||
def car_start(self): |
||||
self._clear_keys_with_type(TxType.CLEAR_ON_CAR_START) |
||||
|
||||
def get(self, key, block=False): |
||||
if key not in keys: |
||||
raise UnknownKeyName(key) |
||||
|
||||
while 1: |
||||
with self.env.begin() as txn: |
||||
ret = txn.get(key) |
||||
if not block or ret is not None: |
||||
break |
||||
# is polling really the best we can do? |
||||
time.sleep(0.05) |
||||
return ret |
||||
|
||||
def put(self, key, dat): |
||||
if key not in keys: |
||||
raise UnknownKeyName(key) |
||||
|
||||
with self.env.begin(write=True) as txn: |
||||
txn.put(key, dat) |
||||
print "set", key |
||||
|
||||
if __name__ == "__main__": |
||||
params = Params() |
||||
if len(sys.argv) > 2: |
||||
params.put(sys.argv[1], sys.argv[2]) |
||||
else: |
||||
for k in keys: |
||||
pp = params.get(k) |
||||
if pp is None: |
||||
print k, "is None" |
||||
elif all(ord(c) < 128 and ord(c) >= 32 for c in pp): |
||||
print k, pp |
||||
else: |
||||
print k, pp.encode("hex") |
||||
|
||||
# Test multiprocess: |
||||
# seq 0 100000 | xargs -P20 -I{} python common/params.py DongleId {} && sleep 0.05 |
||||
# while python common/params.py DongleId; do sleep 0.05; done |
@ -1,90 +0,0 @@ |
||||
# TODO: these port numbers are hardcoded in c, fix this |
||||
|
||||
# LogRotate: 8001 is a PUSH PULL socket between loggerd and visiond |
||||
|
||||
class Service(object): |
||||
def __init__(self, port, should_log): |
||||
self.port = port |
||||
self.should_log = should_log |
||||
|
||||
# all ZMQ pub sub |
||||
service_list = { |
||||
# frame syncing packet |
||||
"frame": Service(8002, True), |
||||
# accel, gyro, and compass |
||||
"sensorEvents": Service(8003, True), |
||||
# GPS data, also global timestamp |
||||
"gpsNMEA": Service(8004, True), |
||||
# CPU+MEM+GPU+BAT temps |
||||
"thermal": Service(8005, True), |
||||
# List(CanData), list of can messages |
||||
"can": Service(8006, True), |
||||
"live100": Service(8007, True), |
||||
# random events we want to log |
||||
#"liveEvent": Service(8008, True), |
||||
"model": Service(8009, True), |
||||
"features": Service(8010, True), |
||||
"health": Service(8011, True), |
||||
"live20": Service(8012, True), |
||||
#"liveUI": Service(8014, True), |
||||
"encodeIdx": Service(8015, True), |
||||
"liveTracks": Service(8016, True), |
||||
"sendcan": Service(8017, True), |
||||
"logMessage": Service(8018, True), |
||||
"liveCalibration": Service(8019, True), |
||||
"androidLog": Service(8020, True), |
||||
"carState": Service(8021, True), |
||||
# 8022 is reserved for sshd |
||||
"carControl": Service(8023, True), |
||||
} |
||||
|
||||
# manager -- base process to manage starting and stopping of all others |
||||
# subscribes: health |
||||
# publishes: thermal |
||||
|
||||
# **** processes that communicate with the outside world **** |
||||
|
||||
# boardd -- communicates with the car |
||||
# subscribes: sendcan |
||||
# publishes: can, health |
||||
|
||||
# sensord -- publishes the IMU and GPS |
||||
# publishes: sensorEvents, gpsNMEA |
||||
|
||||
# visiond -- talks to the cameras, runs the model, saves the videos |
||||
# subscribes: liveCalibration, sensorEvents |
||||
# publishes: frame, encodeIdx, model, features |
||||
|
||||
# **** stateful data transformers **** |
||||
|
||||
# controlsd -- actually drives the car |
||||
# subscribes: can, thermal, model, live20 |
||||
# publishes: carState, carControl, sendcan, live100 |
||||
|
||||
# radard -- processes the radar data |
||||
# subscribes: can, live100, model |
||||
# publishes: live20, liveTracks |
||||
|
||||
# calibrationd -- places the camera box |
||||
# subscribes: features, live100 |
||||
# publishes: liveCalibration |
||||
|
||||
# **** LOGGING SERVICE **** |
||||
|
||||
# loggerd |
||||
# subscribes: EVERYTHING |
||||
|
||||
# **** NON VITAL SERVICES **** |
||||
|
||||
# ui |
||||
# subscribes: live100, live20, liveCalibration, model, (raw frames) |
||||
|
||||
# uploader |
||||
# communicates through file system with loggerd |
||||
|
||||
# logmessaged -- central logging service, can log to cloud |
||||
# publishes: logMessage |
||||
|
||||
# logcatd -- fetches logcat info from android |
||||
# publishes: androidLog |
||||
|
@ -0,0 +1,305 @@ |
||||
VERSION "" |
||||
|
||||
|
||||
NS_ : |
||||
NS_DESC_ |
||||
CM_ |
||||
BA_DEF_ |
||||
BA_ |
||||
VAL_ |
||||
CAT_DEF_ |
||||
CAT_ |
||||
FILTER |
||||
BA_DEF_DEF_ |
||||
EV_DATA_ |
||||
ENVVAR_DATA_ |
||||
SGTYPE_ |
||||
SGTYPE_VAL_ |
||||
BA_DEF_SGTYPE_ |
||||
BA_SGTYPE_ |
||||
SIG_TYPE_REF_ |
||||
VAL_TABLE_ |
||||
SIG_GROUP_ |
||||
SIG_VALTYPE_ |
||||
SIGTYPE_VALTYPE_ |
||||
BO_TX_BU_ |
||||
BA_DEF_REL_ |
||||
BA_REL_ |
||||
BA_DEF_DEF_REL_ |
||||
BU_SG_REL_ |
||||
BU_EV_REL_ |
||||
BU_BO_REL_ |
||||
SG_MUL_VAL_ |
||||
|
||||
BS_: |
||||
|
||||
BU_: INTERCEPTOR EBCM NEO ADAS PCM EPS VSA SCM BDY XXX EPB |
||||
|
||||
|
||||
BO_ 57 XXX_1: 3 XXX |
||||
|
||||
BO_ 342 STEERING_SENSORS: 6 EPS |
||||
SG_ STEER_ANGLE : 7|16@0- (-0.1,0) [-500|500] "deg" NEO |
||||
SG_ STEER_ANGLE_RATE : 23|16@0- (1,0) [-3000|3000] "deg/s" NEO |
||||
SG_ COUNTER : 45|2@0+ (1,0) [0|3] "" NEO |
||||
SG_ CHECKSUM : 43|4@0+ (1,0) [0|3] "" NEO |
||||
|
||||
BO_ 344 POWERTRAIN_DATA: 8 PCM |
||||
SG_ XMISSION_SPEED : 7|16@0+ (0.002759506,0) [0|70] "m/s" NEO |
||||
SG_ ENGINE_RPM : 23|16@0+ (1,0) [0|15000] "rpm" NEO |
||||
SG_ XMISSION_SPEED2 : 39|16@0+ (0.002759506,0) [0|70] "m/s" NEO |
||||
SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" NEO |
||||
SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" NEO |
||||
|
||||
BO_ 380 POWERTRAIN_DATA2: 8 PCM |
||||
SG_ PEDAL_GAS : 7|8@0+ (1,0) [0|255] "" NEO |
||||
SG_ ENGINE_RPM : 23|16@0+ (1,0) [0|15000] "rpm" NEO |
||||
SG_ GAS_PRESSED : 39|1@0+ (1,0) [0|1] "" NEO |
||||
SG_ ACC_STATUS : 38|1@0+ (1,0) [0|1] "rpm" NEO |
||||
SG_ BOH_17C : 37|5@0+ (1,0) [0|1] "rpm" NEO |
||||
SG_ BRAKE_LIGHTS_ON : 32|1@0+ (1,0) [0|1] "rpm" NEO |
||||
SG_ BOH2_17C : 47|10@0+ (1,0) [0|1] "rpm" NEO |
||||
SG_ BRAKE_PRESSED : 53|1@0+ (1,0) [0|1] "" NEO |
||||
SG_ BOH3_17C : 52|5@0+ (1,0) [0|1] "rpm" NEO |
||||
SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" NEO |
||||
SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" NEO |
||||
|
||||
BO_ 401 GEARBOX: 8 PCM |
||||
SG_ GEAR_SHIFTER : 5|6@0+ (1,0) [0|63] "" NEO |
||||
SG_ GEAR : 35|4@0+ (1,0) [0|15] "" NEO |
||||
SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" NEO |
||||
SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" NEO |
||||
|
||||
BO_ 420 VSA_STATUS: 8 VSA |
||||
SG_ USER_BRAKE : 7|16@0+ (0.015625,-1.609375) [0|1000] "" NEO |
||||
SG_ ESP_DISABLED : 28|1@0+ (1,0) [0|1] "" NEO |
||||
SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" NEO |
||||
SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" NEO |
||||
|
||||
BO_ 422 SCM_BUTTONS: 8 SCM |
||||
SG_ CRUISE_BUTTONS : 7|3@0+ (1,0) [0|7] "" NEO |
||||
SG_ LIGHTS_SETTING : 1|2@0+ (1,0) [0|3] "" NEO |
||||
SG_ MAIN_ON : 47|1@0+ (1,0) [0|1] "" NEO |
||||
SG_ CRUISE_SETTING : 43|2@0+ (1,0) [0|3] "" NEO |
||||
SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" NEO |
||||
SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" NEO |
||||
|
||||
BO_ 427 XXX_3: 3 VSA |
||||
|
||||
BO_ 428 XXX_4: 8 XXX |
||||
|
||||
BO_ 432 STANDSTILL: 7 VSA |
||||
SG_ WHEELS_MOVING : 12|1@0+ (1,0) [0|1] "" NEO |
||||
SG_ BRAKE_ERROR_1 : 11|1@0+ (1,0) [0|1] "" NEO |
||||
SG_ BRAKE_ERROR_2 : 9|1@0+ (1,0) [0|1] "" NEO |
||||
SG_ COUNTER : 53|2@0+ (1,0) [0|3] "" NEO |
||||
SG_ CHECKSUM : 51|4@0+ (1,0) [0|3] "" NEO |
||||
|
||||
BO_ 450 XXX_5: 8 EPB |
||||
SG_ EPB_ACTIVE : 3|1@0+ (1,0) [0|1] "" NEO |
||||
SG_ EPB_STATE : 29|2@0+ (1,0) [0|3] "" NEO |
||||
|
||||
BO_ 464 WHEEL_SPEEDS: 8 VSA |
||||
SG_ WHEEL_SPEED_FL : 7|15@0+ (0.002759506,0) [0|70] "m/s" NEO |
||||
SG_ WHEEL_SPEED_FR : 8|15@0+ (0.002759506,0) [0|70] "m/s" NEO |
||||
SG_ WHEEL_SPEED_RL : 25|15@0+ (0.002759506,0) [0|70] "m/s" NEO |
||||
SG_ WHEEL_SPEED_RR : 42|15@0+ (0.002759506,0) [0|70] "m/s" NEO |
||||
SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" NEO |
||||
|
||||
BO_ 470 XXX_6: 2 VSA |
||||
|
||||
BO_ 476 XXX_7: 7 XXX |
||||
|
||||
BO_ 487 XXX_8: 4 VSA |
||||
SG_ BRAKE_PRESSURE1 : 7|10@0+ (0.015625,-103) [0|1000] "" NEO |
||||
SG_ BRAKE_PRESSURE2 : 9|10@0+ (0.015625,-103) [0|1000] "" NEO |
||||
|
||||
BO_ 490 VEHICLE_DYNAMICS: 8 VSA |
||||
SG_ LONG_ACCEL : 23|16@0- (0.0015384,0) [-20|20] "m/s2" NEO |
||||
|
||||
BO_ 493 XXX_9: 5 VSA |
||||
|
||||
BO_ 506 BRAKE_COMMAND: 8 ADAS |
||||
SG_ COMPUTER_BRAKE : 7|10@0+ (0.003906248,0) [0|1] "" EBCM |
||||
SG_ ZEROS_BOH : 13|5@0+ (1,0) [0|1] "" EBCM |
||||
SG_ COMPUTER_BRAKE_REQUEST : 8|1@0+ (1,0) [0|1] "" EBCM |
||||
SG_ CRUISE_BOH2 : 23|3@0+ (1,0) [0|1] "" EBCM |
||||
SG_ CRUISE_OVERRIDE : 20|1@0+ (1,0) [0|1] "" EBCM |
||||
SG_ CRUISE_BOH3 : 19|1@0+ (1,0) [0|1] "" EBCM |
||||
SG_ CRUISE_FAULT_CMD : 18|1@0+ (1,0) [0|1] "" EBCM |
||||
SG_ CRUISE_CANCEL_CMD : 17|1@0+ (1,0) [0|1] "" EBCM |
||||
SG_ COMPUTER_BRAKE_REQUEST_2 : 16|1@0+ (1,0) [0|1] "" EBCM |
||||
SG_ SET_ME_0X80 : 31|8@0+ (1,0) [0|1] "" EBCM |
||||
SG_ BRAKE_LIGHTS : 39|1@0+ (1,0) [0|1] "" EBCM |
||||
SG_ CRUISE_STATES : 38|7@0+ (1,0) [0|1] "" EBCM |
||||
SG_ CHIME : 47|3@0+ (1,0) [0|7] "" EBCM |
||||
SG_ ZEROS_BOH6 : 44|1@0+ (1,0) [0|1] "" EBCM |
||||
SG_ FCW : 43|1@0+ (1,0) [0|3] "" EBCM |
||||
SG_ ZEROS_BOH3 : 42|2@0+ (1,0) [0|0] "" EBCM |
||||
SG_ FCW2 : 40|1@0+ (1,0) [0|0] "" EBCM |
||||
SG_ ZEROS_BOH4 : 55|8@0+ (1,0) [0|0] "" EBCM |
||||
SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" EBCM |
||||
SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" EBCM |
||||
|
||||
BO_ 512 GAS_COMMAND: 3 NEO |
||||
SG_ GAS_COMMAND : 7|16@0+ (0.253984064,-328) [0|1] "" INTERCEPTOR |
||||
SG_ COUNTER : 21|2@0+ (1,0) [0|3] "" INTERCEPTOR |
||||
SG_ CHECKSUM : 19|4@0+ (1,0) [0|3] "" INTERCEPTOR |
||||
|
||||
BO_ 513 GAS_SENSOR: 5 INTERCEPTOR |
||||
SG_ INTERCEPTOR_GAS : 7|16@0+ (0.253984064,-328) [0|1] "" NEO |
||||
SG_ INTERCEPTOR_GAS2 : 23|16@0+ (0.126992032,-656) [0|1] "" NEO |
||||
SG_ COUNTER : 37|2@0+ (1,0) [0|3] "" NEO |
||||
SG_ CHECKSUM : 35|4@0+ (1,0) [0|3] "" NEO |
||||
|
||||
BO_ 545 XXX_10: 6 XXX |
||||
|
||||
BO_ 597 ROUGH_WHEEL_SPEED: 8 VSA |
||||
SG_ WHEEL_SPEED_FL : 7|8@0+ (1,0) [0|255] "mph" NEO |
||||
SG_ WHEEL_SPEED_FR : 15|8@0+ (1,0) [0|255] "mph" NEO |
||||
SG_ WHEEL_SPEED_RL : 23|8@0+ (1,0) [0|255] "mph" NEO |
||||
SG_ WHEEL_SPEED_RR : 31|8@0+ (1,0) [0|255] "mph" NEO |
||||
SG_ SET_TO_X55 : 39|8@0+ (1,0) [0|255] "" NEO |
||||
SG_ SET_TO_X55 : 47|8@0+ (1,0) [0|255] "" NEO |
||||
|
||||
BO_ 660 SCM_COMMANDS: 8 SCM |
||||
SG_ RIGHT_BLINKER : 6|1@0+ (1,0) [0|1] "" NEO |
||||
SG_ LEFT_BLINKER : 5|1@0+ (1,0) [0|1] "" NEO |
||||
SG_ WIPERS_SPEED : 4|2@0+ (1,0) [0|3] "" NEO |
||||
|
||||
BO_ 662 CRUISE_BUTTONS: 4 SCM |
||||
SG_ CRUISE_BUTTONS : 7|3@0+ (1,0) [0|7] "" NEO |
||||
SG_ CRUISE_SETTING : 3|2@0+ (1,0) [0|3] "" NEO |
||||
|
||||
BO_ 773 SEATBELT_STATUS: 7 BDY |
||||
SG_ SEATBELT_DRIVER_LAMP : 7|1@0+ (1,0) [0|1] "" NEO |
||||
SG_ SEATBELT_DRIVER_LATCHED : 13|1@0+ (1,0) [0|1] "" NEO |
||||
SG_ COUNTER : 53|2@0+ (1,0) [0|3] "" NEO |
||||
SG_ CHECKSUM : 51|4@0+ (1,0) [0|3] "" NEO |
||||
|
||||
BO_ 777 XXX_11: 8 XXX |
||||
|
||||
BO_ 780 ACC_HUD: 8 ADAS |
||||
SG_ PCM_SPEED : 7|16@0+ (0.002763889,0) [0|100] "m/s" BDY |
||||
SG_ PCM_GAS : 23|7@0+ (1,0) [0|127] "" BDY |
||||
SG_ ZEROS_BOH : 16|1@0+ (1,0) [0|255] "" BDY |
||||
SG_ CRUISE_SPEED : 31|8@0+ (1,0) [0|255] "" BDY |
||||
SG_ DTC_MODE : 39|1@0+ (1,0) [0|1] "" BDY |
||||
SG_ BOH : 38|1@0+ (1,0) [0|1] "" BDY |
||||
SG_ ACC_PROBLEM : 37|1@0+ (1,0) [0|1] "" BDY |
||||
SG_ FCM_OFF : 36|1@0+ (1,0) [0|1] "" BDY |
||||
SG_ BOH_2 : 35|1@0+ (1,0) [0|1] "" BDY |
||||
SG_ FCM_PROBLEM : 34|1@0+ (1,0) [0|1] "" BDY |
||||
SG_ RADAR_OBSTRUCTED : 33|1@0+ (1,0) [0|1] "" BDY |
||||
SG_ ENABLE_MINI_CAR : 32|1@0+ (1,0) [0|1] "" BDY |
||||
SG_ HUD_DISTANCE : 47|2@0+ (1,0) [0|3] "" BDY |
||||
SG_ HUD_LEAD : 45|2@0+ (1,0) [0|3] "" BDY |
||||
SG_ BOH_3 : 43|1@0+ (1,0) [0|3] "" BDY |
||||
SG_ BOH_4 : 42|1@0+ (1,0) [0|3] "" BDY |
||||
SG_ BOH_5 : 41|1@0+ (1,0) [0|3] "" BDY |
||||
SG_ CRUISE_CONTROL_LABEL : 40|1@0+ (1,0) [0|3] "" BDY |
||||
SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" BDY |
||||
SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" BDY |
||||
|
||||
BO_ 795 XXX_12: 8 XXX |
||||
|
||||
BO_ 800 XXX_13: 8 XXX |
||||
|
||||
BO_ 804 CRUISE: 8 PCM |
||||
SG_ ENGINE_TEMPERATURE : 7|8@0+ (1,0) [0|255] "" NEO |
||||
SG_ BOH : 15|8@0+ (1,0) [0|255] "" NEO |
||||
SG_ TRIP_FUEL_CONSUMED : 23|16@0+ (1,0) [0|255] "" NEO |
||||
SG_ CRUISE_SPEED_PCM : 39|8@0+ (1,0) [0|255] "" NEO |
||||
SG_ BOH2 : 47|8@0- (1,0) [0|255] "" NEO |
||||
SG_ BOH3 : 55|8@0+ (1,0) [0|255] "" NEO |
||||
SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" NEO |
||||
SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" NEO |
||||
|
||||
BO_ 808 XXX_14: 8 XXX |
||||
|
||||
BO_ 829 LKAS_HUD_2: 5 ADAS |
||||
SG_ CAM_TEMP_HIGH : 7|1@0+ (1,0) [0|255] "" BDY |
||||
SG_ BOH : 6|7@0+ (1,0) [0|127] "" BDY |
||||
SG_ DASHED_LANES : 14|1@0+ (1,0) [0|1] "" BDY |
||||
SG_ DTC : 13|1@0+ (1,0) [0|1] "" BDY |
||||
SG_ LKAS_PROBLEM : 12|1@0+ (1,0) [0|1] "" BDY |
||||
SG_ LKAS_OFF : 11|1@0+ (1,0) [0|1] "" BDY |
||||
SG_ SOLID_LANES : 10|1@0+ (1,0) [0|1] "" BDY |
||||
SG_ LDW_RIGHT : 9|1@0+ (1,0) [0|1] "" BDY |
||||
SG_ STEERING_REQUIRED : 8|1@0+ (1,0) [0|1] "" BDY |
||||
SG_ BOH : 23|2@0+ (1,0) [0|4] "" BDY |
||||
SG_ LDW_PROBLEM : 21|1@0+ (1,0) [0|1] "" BDY |
||||
SG_ BEEP : 17|2@0+ (1,0) [0|1] "" BDY |
||||
SG_ LDW_ON : 28|1@0+ (1,0) [0|1] "" BDY |
||||
SG_ LDW_OFF : 27|1@0+ (1,0) [0|1] "" BDY |
||||
SG_ CLEAN_WINDSHIELD : 26|1@0+ (1,0) [0|1] "" BDY |
||||
SG_ SET_ME_X48 : 31|8@0+ (1,0) [0|255] "" BDY |
||||
SG_ COUNTER : 37|2@0+ (1,0) [0|3] "" BDY |
||||
SG_ CHECKSUM : 35|4@0+ (1,0) [0|3] "" BDY |
||||
|
||||
BO_ 862 XXX_15: 8 ADAS |
||||
SG_ UI_ALERTS : 7|56@0+ (1,0) [0|127] "" BDY |
||||
|
||||
BO_ 884 XXX_16: 8 XXX |
||||
|
||||
BO_ 891 XXX_17: 8 XXX |
||||
|
||||
BO_ 892 XXX_18: 8 XXX |
||||
|
||||
BO_ 927 XXX_19: 8 ADAS |
||||
SG_ ZEROS_BOH : 7|17@0+ (1,0) [0|127] "" BDY |
||||
SG_ APPLY_BRAKES_FOR_CANC : 23|1@0+ (1,0) [0|15] "" BDY |
||||
SG_ ZEROS_BOH2 : 22|1@0+ (1,0) [0|1] "" BDY |
||||
SG_ RESUME_INSTRUCTION : 21|1@0+ (1,0) [0|15] "" BDY |
||||
SG_ ACC_ALERTS : 20|5@0+ (1,0) [0|15] "" BDY |
||||
SG_ ZEROS_BOH2 : 31|8@0+ (1,0) [0|127] "" BDY |
||||
SG_ LEAD_SPEED : 39|9@0+ (1,0) [0|127] "" BDY |
||||
SG_ LEAD_STATE : 46|3@0+ (1,0) [0|127] "" BDY |
||||
SG_ LEAD_DISTANCE : 43|5@0+ (1,0) [0|31] "" BDY |
||||
SG_ ZEROS_BOH3 : 54|7@0+ (1,0) [0|127] "" BDY |
||||
|
||||
BO_ 929 XXX_20: 8 XXX |
||||
|
||||
BO_ 985 XXX_21: 3 XXX |
||||
|
||||
BO_ 1024 XXX_22: 5 XXX |
||||
|
||||
BO_ 1027 XXX_23: 5 XXX |
||||
|
||||
BO_ 1029 DOORS_STATUS: 8 BDY |
||||
SG_ DOOR_OPEN_FL : 37|1@0+ (1,0) [0|1] "" NEO |
||||
SG_ DOOR_OPEN_FR : 38|1@0+ (1,0) [0|1] "" NEO |
||||
SG_ DOOR_OPEN_RL : 39|1@0+ (1,0) [0|1] "" NEO |
||||
SG_ DOOR_OPEN_RR : 40|1@0+ (1,0) [0|1] "" NEO |
||||
SG_ COUNTER : 61|2@0+ (1,0) [0|3] "" NEO |
||||
SG_ CHECKSUM : 59|4@0+ (1,0) [0|3] "" NEO |
||||
|
||||
BO_ 1036 XXX_24: 8 XXX |
||||
|
||||
BO_ 1039 XXX_25: 8 XXX |
||||
|
||||
BO_ 1108 XXX_26: 8 XXX |
||||
|
||||
BO_ 1302 XXX_27: 8 XXX |
||||
|
||||
BO_ 1322 XXX_28: 5 XXX |
||||
|
||||
BO_ 1361 XXX_29: 5 XXX |
||||
|
||||
BO_ 1365 XXX_30: 5 XXX |
||||
|
||||
BO_ 1424 XXX_31: 5 XXX |
||||
|
||||
BO_ 1600 XXX_32: 5 XXX |
||||
|
||||
BO_ 1601 XXX_33: 8 XXX |
||||
|
||||
BO_ 1633 XXX_34: 8 XXX |
||||
|
||||
BO_TX_BU_ 228 : NEO,ADAS; |
||||
BO_TX_BU_ 506 : NEO,ADAS; |
||||
BO_TX_BU_ 780 : NEO,ADAS; |
||||
BO_TX_BU_ 829 : NEO,ADAS; |
||||
BO_TX_BU_ 862 : NEO,ADAS; |
||||
BO_TX_BU_ 927 : NEO,ADAS; |
||||
|
@ -0,0 +1,405 @@ |
||||
VERSION "" |
||||
|
||||
|
||||
NS_ : |
||||
NS_DESC_ |
||||
CM_ |
||||
BA_DEF_ |
||||
BA_ |
||||
VAL_ |
||||
CAT_DEF_ |
||||
CAT_ |
||||
FILTER |
||||
BA_DEF_DEF_ |
||||
EV_DATA_ |
||||
ENVVAR_DATA_ |
||||
SGTYPE_ |
||||
SGTYPE_VAL_ |
||||
BA_DEF_SGTYPE_ |
||||
BA_SGTYPE_ |
||||
SIG_TYPE_REF_ |
||||
VAL_TABLE_ |
||||
SIG_GROUP_ |
||||
SIG_VALTYPE_ |
||||
SIGTYPE_VALTYPE_ |
||||
BO_TX_BU_ |
||||
BA_DEF_REL_ |
||||
BA_REL_ |
||||
BA_DEF_DEF_REL_ |
||||
BU_SG_REL_ |
||||
BU_EV_REL_ |
||||
BU_BO_REL_ |
||||
SG_MUL_VAL_ |
||||
|
||||
BS_: |
||||
|
||||
BU_: |
||||
NEO |
||||
MCU |
||||
GTW |
||||
EPAS |
||||
DI |
||||
ESP |
||||
SBW |
||||
STW |
||||
|
||||
VAL_TABLE_ StW_AnglHP_Spd 16383 "SNA" ; |
||||
VAL_TABLE_ DI_aebFaultReason 15 "DI_AEB_FAULT_DAS_REQ_DI_UNAVAIL" 14 "DI_AEB_FAULT_ACCEL_REQ_INVALID" 13 "DI_AEB_FAULT_MIN_TIME_BTWN_EVENTS" 12 "DI_AEB_FAULT_ESP_MIA" 11 "DI_AEB_FAULT_ESP_FAULT" 10 "DI_AEB_FAULT_EPB_NOT_PARKED" 9 "DI_AEB_FAULT_ACCEL_OUT_OF_BOUNDS" 8 "DI_AEB_FAULT_PM_REQUEST" 7 "DI_AEB_FAULT_VEL_EST_ABNORMAL" 6 "DI_AEB_FAULT_DAS_SNA" 5 "DI_AEB_FAULT_DAS_CONTROL_MIA" 4 "DI_AEB_FAULT_SPEED_DELTA" 3 "DI_AEB_FAULT_EBR_FAULT" 2 "DI_AEB_FAULT_PM_MIA" 1 "DI_AEB_FAULT_EPB_MIA" 0 "DI_AEB_FAULT_NONE" ; |
||||
VAL_TABLE_ DI_aebLockState 3 "AEB_LOCK_STATE_SNA" 2 "AEB_LOCK_STATE_UNUSED" 1 "AEB_LOCK_STATE_UNLOCKED" 0 "AEB_LOCK_STATE_LOCKED" ; |
||||
VAL_TABLE_ DI_aebSmState 7 "DI_AEB_STATE_FAULT" 6 "DI_AEB_STATE_EXIT" 5 "DI_AEB_STATE_STANDSTILL" 4 "DI_AEB_STATE_STOPPING" 3 "DI_AEB_STATE_ENABLE" 2 "DI_AEB_STATE_ENABLE_INIT" 1 "DI_AEB_STATE_STANDBY" 0 "DI_AEB_STATE_UNAVAILABLE" ; |
||||
VAL_TABLE_ DI_aebState 7 "AEB_CAN_STATE_SNA" 4 "AEB_CAN_STATE_FAULT" 3 "AEB_CAN_STATE_STANDSTILL" 2 "AEB_CAN_STATE_ENABLED" 1 "AEB_CAN_STATE_STANDBY" 0 "AEB_CAN_STATE_UNAVAILABLE" ; |
||||
VAL_TABLE_ DI_epbInterfaceReady 1 "EPB_INTERFACE_READY" 0 "EPB_INTERFACE_NOT_READY" ; |
||||
VAL_TABLE_ DI_gear 7 "DI_GEAR_SNA" 4 "DI_GEAR_D" 3 "DI_GEAR_N" 2 "DI_GEAR_R" 1 "DI_GEAR_P" 0 "DI_GEAR_INVALID" ; |
||||
VAL_TABLE_ DI_gpoReason 8 "DI_GPO_NUMREASONS" 7 "DI_GPO_CAPACITOR_OVERTEMP" 6 "DI_GPO_NOT_ENOUGH_12V" 5 "DI_GPO_NO_BATTERY_POWER" 4 "DI_GPO_AMBIENT_OVERTEMP" 3 "DI_GPO_FLUID_DELTAT" 2 "DI_GPO_STATOR_OVERTEMP" 1 "DI_GPO_HEATSINK_OVERTEMP" 0 "DI_GPO_OUTLET_OVERTEMP" ; |
||||
VAL_TABLE_ DI_immobilizerCondition 1 "DI_IMM_CONDITION_LEARNED" 0 "DI_IMM_CONDITION_VIRGIN_SNA" ; |
||||
VAL_TABLE_ DI_immobilizerState 7 "DI_IMM_STATE_FAULT" 6 "DI_IMM_STATE_FAULTRETRY" 5 "DI_IMM_STATE_RESET" 4 "DI_IMM_STATE_LEARN" 3 "DI_IMM_STATE_DISARMED" 2 "DI_IMM_STATE_AUTHENTICATING" 1 "DI_IMM_STATE_REQUEST" 0 "DI_IMM_STATE_INIT_SNA" ; |
||||
VAL_TABLE_ DI_limpReason 24 "DI_LIMP_NUMREASONS" 23 "DI_LIMP_CAPACITOR_OVERTEMP" 22 "DI_LIMP_GTW_MIA" 21 "DI_LIMP_TRQCMD_VALIDITY_UNKNOWN" 20 "DI_LIMP_DI_MIA" 19 "DI_LIMP_CONFIG_MISMATCH" 18 "DI_LIMP_HEATSINK_TEMP" 17 "DI_LIMP_PMREQUEST" 16 "DI_LIMP_PMHEARTBEAT" 15 "DI_LIMP_TRQ_CROSS_CHECK" 14 "DI_LIMP_EXTERNAL_COMMAND" 13 "DI_LIMP_WRONG_CS_CALIBRATION" 12 "DI_LIMP_STATOR_TEMP" 11 "DI_LIMP_DELTAT_TOO_NEGATIVE" 10 "DI_LIMP_DELTAT_TOO_POSITIVE" 9 "DI_LIMP_AMBIENT_TEMP" 8 "DI_LIMP_OUTLET_TEMP" 7 "DI_LIMP_LOW_FLOW" 6 "DI_LIMP_BMS_MIA" 5 "DI_LIMP_12V_SUPPLY_UNDERVOLTAGE" 4 "DI_LIMP_NO_FLUID" 3 "DI_LIMP_NO_FUNC_HEATSINK_SENSOR" 2 "DI_LIMP_NO_FUNC_STATORT_SENSOR" 1 "DI_LIMP_BUSV_SENSOR_IRRATIONAL" 0 "DI_LIMP_PHASE_IMBALANCE" ; |
||||
VAL_TABLE_ DI_mode 2 "DI_MODE_DYNO" 1 "DI_MODE_DRIVE" 0 "DI_MODE_UNDEF" ; |
||||
VAL_TABLE_ DI_motorType 14 "DI_MOTOR_F2AE" 13 "DI_MOTOR_F2AD" 12 "DI_MOTOR_F2AC" 11 "DI_MOTOR_F2AB" 10 "DI_MOTOR_F1AC" 9 "DI_MOTOR_SSR1A" 8 "DI_MOTOR_F1A" 7 "DI_MOTOR_M7M6" 6 "DI_MOTOR_M8A" 5 "DI_MOTOR_M7M5" 4 "DI_MOTOR_M7M4" 3 "DI_MOTOR_M7M3" 2 "DI_MOTOR_ROADSTER_SPORT" 1 "DI_MOTOR_ROADSTER_BASE" 0 "DI_MOTOR_SNA" ; |
||||
VAL_TABLE_ DI_speedUnits 1 "DI_SPEED_KPH" 0 "DI_SPEED_MPH" ; |
||||
VAL_TABLE_ DI_state 4 "DI_STATE_ENABLE" 3 "DI_STATE_FAULT" 2 "DI_STATE_CLEAR_FAULT" 1 "DI_STATE_STANDBY" 0 "DI_STATE_PREAUTH" ; |
||||
VAL_TABLE_ DI_velocityEstimatorState 4 "VE_STATE_BACKUP_MOTOR" 3 "VE_STATE_BACKUP_WHEELS_B" 2 "VE_STATE_BACKUP_WHEELS_A" 1 "VE_STATE_WHEELS_NORMAL" 0 "VE_STATE_NOT_INITIALIZED" ; |
||||
|
||||
|
||||
BO_ 1160 DAS_steeringControl: 4 NEO |
||||
SG_ DAS_steeringControlType : 23|2@0+ (1,0) [0|0] "" EPAS |
||||
SG_ DAS_steeringControlChecksum : 31|8@0+ (1,0) [0|0] "" EPAS |
||||
SG_ DAS_steeringControlCounter : 19|4@0+ (1,0) [0|0] "" EPAS |
||||
SG_ DAS_steeringAngleRequest : 6|15@0+ (0.1,-1638.35) [-1638.35|1638.35] "deg" EPAS |
||||
SG_ DAS_steeringHapticRequest : 7|1@0+ (1,0) [0|0] "" EPAS |
||||
|
||||
BO_ 257 GTW_epasControl: 3 NEO |
||||
SG_ GTW_epasControlChecksum : 16|8@1+ (1,0) [0|255] "" NEO |
||||
SG_ GTW_epasControlCounter : 12|4@1+ (1,0) [0|15] "" NEO |
||||
SG_ GTW_epasControlType : 8|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ GTW_epasEmergencyOn : 0|1@1+ (1,0) [2|-1] "" NEO |
||||
SG_ GTW_epasLDWEnabled : 11|1@1+ (1,0) [2|-1] "" NEO |
||||
SG_ GTW_epasPowerMode : 1|4@1+ (1,0) [4|14] "" NEO |
||||
SG_ GTW_epasTuneRequest : 5|3@1+ (1,0) [8|-1] "" NEO |
||||
|
||||
BO_ 880 EPAS_sysStatus: 8 EPAS |
||||
SG_ EPAS_currentTuneMode : 0|4@1+ (1,0) [8|15] "" NEO |
||||
SG_ EPAS_eacErrorCode : 16|4@1+ (1,0) [16|-1] "" NEO |
||||
SG_ EPAS_eacStatus : 48|3@1+ (1,0) [5|7] "" NEO |
||||
SG_ EPAS_handsOnLevel : 32|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ EPAS_internalSAS : 37|14@0+ (0.10,-819.200010) [0|0] "deg" NEO |
||||
SG_ EPAS_steeringFault : 5|1@1+ (1,0) [2|-1] "" NEO |
||||
SG_ EPAS_steeringRackForce : 1|10@0+ (50,-25575) [0|0] "N" NEO |
||||
SG_ EPAS_steeringReduced : 4|1@1+ (1,0) [2|-1] "" NEO |
||||
SG_ EPAS_sysStatusChecksum : 56|8@1+ (1,0) [0|255] "" NEO |
||||
SG_ EPAS_sysStatusCounter : 52|4@1+ (1,0) [0|15] "" NEO |
||||
SG_ EPAS_torsionBarTorque : 19|12@0+ (0.010,-20.50) [0|0] "Nm" NEO |
||||
|
||||
BO_ 3 STW_ANGL_STAT: 8 STW |
||||
SG_ CRC_STW_ANGL_STAT : 56|8@1+ (1,0) [0|255] "" NEO |
||||
SG_ MC_STW_ANGL_STAT : 52|4@1+ (1,0) [0|15] "" NEO |
||||
SG_ StW_Angl : 5|14@0+ (0.50,-2048) [0|0] "deg" NEO |
||||
SG_ StW_AnglSens_Id : 36|2@1+ (1,0) [3|3] "" NEO |
||||
SG_ StW_AnglSens_Stat : 38|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ StW_AnglSpd : 21|14@0+ (0.50,-2048) [0|0] "/s" NEO |
||||
|
||||
BO_ 14 STW_ANGLHP_STAT: 8 GTW |
||||
SG_ StW_AnglHP : 5|14@0+ (0.1,-819.2) [-819.2|819] "deg" NEO |
||||
SG_ StW_AnglHP_Spd : 21|14@0+ (0.5,-4096) [-4096|4095.5] "deg/s" NEO |
||||
SG_ StW_AnglHP_Sens_Stat : 33|2@0+ (1,0) [0|0] "" NEO |
||||
SG_ StW_AnglHP_Sens_Id : 35|2@0+ (1,0) [0|0] "" NEO |
||||
SG_ MC_STW_ANGLHP_STAT : 55|4@0+ (1,0) [0|15] "" NEO |
||||
SG_ CRC_STW_ANGLHP_STAT : 63|8@0+ (1,0) [0|0] "" NEO |
||||
|
||||
BO_ 264 DI_torque1: 8 DI |
||||
SG_ DI_torqueDriver : 0|13@1- (0.25,0) [-750|750] "Nm" NEO |
||||
SG_ DI_torque1Counter : 13|3@1+ (1,0) [0|0] "" NEO |
||||
SG_ DI_torqueMotor : 16|13@1- (0.25,0) [-750|750] "Nm" NEO |
||||
SG_ DI_soptState : 29|3@1+ (1,0) [0|0] "" NEO |
||||
SG_ DI_motorRPM : 32|16@1- (1,0) [-17000|17000] "RPM" NEO |
||||
SG_ DI_pedalPos : 48|8@1+ (0.4,0) [0|100] "%" NEO |
||||
SG_ DI_torque1Checksum : 56|8@1+ (1,0) [0|0] "" NEO |
||||
|
||||
BO_ 280 DI_torque2: 6 DI |
||||
SG_ DI_torqueEstimate : 0|12@1- (0.5,0) [-750|750] "Nm" NEO |
||||
SG_ DI_gear : 12|3@1+ (1,0) [0|0] "" NEO |
||||
SG_ DI_brakePedal : 15|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ DI_vehicleSpeed : 16|12@1+ (0.05,-25) [-25|179.75] "MPH" NEO |
||||
SG_ DI_gearRequest : 28|3@1+ (1,0) [0|0] "" NEO |
||||
SG_ DI_torqueInterfaceFailure : 31|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ DI_torque2Counter : 32|4@1+ (1,0) [0|0] "" NEO |
||||
SG_ DI_brakePedalState : 36|2@1+ (1,0) [0|0] "" NEO |
||||
SG_ DI_epbParkRequest : 38|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ DI_epbInterfaceReady : 39|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ DI_torque2Checksum : 40|8@1+ (1,0) [0|0] "" NEO |
||||
|
||||
BO_ 309 ESP_135h: 5 ESP |
||||
SG_ ESP_135hChecksum : 16|8@1+ (1,0) [0|255] "" NEO |
||||
SG_ ESP_135hCounter : 12|4@1+ (1,0) [0|15] "" NEO |
||||
SG_ ESP_absBrakeEvent : 5|1@1+ (1,0) [2|-1] "" NEO |
||||
SG_ ESP_brakeDiscWipingActive : 3|1@1+ (1,0) [2|-1] "" NEO |
||||
SG_ ESP_brakeLamp : 4|1@1+ (1,0) [2|-1] "" NEO |
||||
SG_ ESP_espFaultLamp : 1|1@1+ (1,0) [2|-1] "" NEO |
||||
SG_ ESP_espLampFlash : 0|1@1+ (1,0) [2|-1] "" NEO |
||||
SG_ ESP_hillStartAssistActive : 6|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ ESP_messagePumpService : 31|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ ESP_messagePumpFailure : 30|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ ESP_messageEBDFailure : 29|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ ESP_absFaultLamp : 28|1@1+ (1,0) [2|-1] "" NEO |
||||
SG_ ESP_tcDisabledByFault : 27|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ ESP_messageDynoModeActive : 26|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ ESP_hydraulicBoostEnabled : 25|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ ESP_espOffLamp : 24|1@1+ (1,0) [2|-1] "" NEO |
||||
SG_ ESP_stabilityControlSts : 9|3@1+ (1,0) [6|7] "" NEO |
||||
SG_ ESP_tcLampFlash : 2|1@1+ (1,0) [2|-1] "" NEO |
||||
SG_ ESP_tcOffLamp : 8|1@1+ (1,0) [0|1] "" NEO |
||||
|
||||
BO_ 792 GTW_carState: 8 GTW |
||||
SG_ BOOT_STATE : 40|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ CERRD : 0|1@1+ (1,0) [2|-1] "" NEO |
||||
SG_ DAY : 35|5@1+ (1,0) [2|31] "" NEO |
||||
SG_ DOOR_STATE_FL : 10|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ DOOR_STATE_FR : 8|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ DOOR_STATE_FrontTrunk : 52|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ DOOR_STATE_RL : 16|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ DOOR_STATE_RR : 25|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ GTW_updateInProgress : 54|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ Hour : 27|5@1+ (1,0) [0|29] "h" NEO |
||||
SG_ MCU_factoryMode : 51|1@1+ (1,0) [2|-1] "" NEO |
||||
SG_ MCU_transportModeOn : 50|1@1+ (1,0) [1|1] "" NEO |
||||
SG_ MINUTE : 42|6@1+ (1,0) [0|61] "min" NEO |
||||
SG_ MONTH : 12|4@1+ (1,0) [0|14] "Month" NEO |
||||
SG_ SECOND : 18|6@1+ (1,0) [0|61] "s" NEO |
||||
SG_ YEAR : 1|7@1+ (1,2000) [2000|2125] "Year" NEO |
||||
|
||||
BO_ 872 DI_state: 8 DI |
||||
SG_ DI_aebState : 44|3@1+ (1,0) [5|6] "" NEO |
||||
SG_ DI_analogSpeed : 20|12@1+ (0.10,0) [0|409.40] "speed" NEO |
||||
SG_ DI_cruiseSet : 39|9@1+ (0.50,0) [0|255.50] "speed" NEO |
||||
SG_ DI_cruiseState : 8|4@1+ (1,0) [8|15] "" NEO |
||||
SG_ DI_digitalSpeed : 48|8@1+ (1,0) [0|254] "" NEO |
||||
SG_ DI_driveReady : 0|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ DI_immobilizerState : 25|3@1+ (1,0) [7|7] "" NEO |
||||
SG_ DI_proximity : 1|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ DI_regenLight : 15|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ DI_speedUnits : 24|1@1+ (1,0) [2|-1] "" NEO |
||||
SG_ DI_state : 12|3@1+ (1,0) [5|7] "" NEO |
||||
SG_ DI_stateChecksum : 56|8@1+ (1,0) [0|255] "" NEO |
||||
SG_ DI_stateCounter : 40|4@1+ (1,0) [0|15] "" NEO |
||||
SG_ DI_systemState : 5|3@1+ (1,0) [5|7] "" NEO |
||||
SG_ DI_vehicleHoldState : 2|3@1+ (1,0) [8|-1] "" NEO |
||||
|
||||
BO_ 109 SBW_RQ_SCCM: 4 STW |
||||
SG_ StW_Sw_Stat3 : 0|3@1+ (1,0) [0|0] "" NEO |
||||
SG_ MsgTxmtId : 6|2@1+ (1,0) [0|0] "" NEO |
||||
SG_ TSL_RND_Posn_StW : 8|4@1+ (1,0) [0|0] "" NEO |
||||
SG_ TSL_P_Psd_StW : 12|2@1+ (1,0) [0|0] "" NEO |
||||
SG_ MC_SBW_RQ_SCCM : 20|4@1+ (1,0) [0|15] "" NEO |
||||
SG_ CRC_SBW_RQ_SCCM : 24|8@1+ (1,0) [0|0] "" NEO |
||||
|
||||
BO_ 69 STW_ACTN_RQ: 8 STW |
||||
SG_ SpdCtrlLvr_Stat : 0|6@1+ (1,0) [0|0] "" NEO |
||||
SG_ VSL_Enbl_Rq : 6|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ SpdCtrlLvrStat_Inv : 7|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ DTR_Dist_Rq : 8|8@1+ (1,0) [0|200] "" NEO |
||||
SG_ TurnIndLvr_Stat : 16|2@1+ (1,0) [0|0] "" NEO |
||||
SG_ HiBmLvr_Stat : 18|2@1+ (1,0) [0|0] "" NEO |
||||
SG_ WprWashSw_Psd : 20|2@1+ (1,0) [0|0] "" NEO |
||||
SG_ WprWash_R_Sw_Posn_V2 : 22|2@1+ (1,0) [0|0] "" NEO |
||||
SG_ StW_Lvr_Stat : 24|3@1+ (1,0) [0|0] "" NEO |
||||
SG_ StW_Cond_Flt : 27|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ StW_Cond_Psd : 28|2@1+ (1,0) [0|0] "" NEO |
||||
SG_ HrnSw_Psd : 30|2@1+ (1,0) [0|0] "" NEO |
||||
SG_ StW_Sw00_Psd : 32|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ StW_Sw01_Psd : 33|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ StW_Sw02_Psd : 34|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ StW_Sw03_Psd : 35|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ StW_Sw04_Psd : 36|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ StW_Sw05_Psd : 37|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ StW_Sw06_Psd : 38|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ StW_Sw07_Psd : 39|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ StW_Sw08_Psd : 40|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ StW_Sw09_Psd : 41|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ StW_Sw10_Psd : 42|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ StW_Sw11_Psd : 43|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ StW_Sw12_Psd : 44|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ StW_Sw13_Psd : 45|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ StW_Sw14_Psd : 46|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ StW_Sw15_Psd : 47|1@1+ (1,0) [0|0] "" NEO |
||||
SG_ WprSw6Posn : 48|3@1+ (1,0) [0|0] "" NEO |
||||
SG_ MC_STW_ACTN_RQ : 52|4@1+ (1,0) [0|15] "" NEO |
||||
SG_ CRC_STW_ACTN_RQ : 56|8@1+ (1,0) [0|0] "" NEO |
||||
|
||||
BO_ 643 BODY_R1: 8 GTW |
||||
SG_ AirTemp_Insd : 40|8@1+ (0.25,0) [0|63.5] "C" NEO |
||||
SG_ AirTemp_Outsd : 56|8@1+ (0.5,-40) [-40|86.5] "C" NEO |
||||
SG_ Bckl_Sw_RL_Stat_SAM_R : 54|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ Bckl_Sw_RM_Stat_SAM_R : 50|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ Bckl_Sw_RR_Stat_SAM_R : 52|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ DL_RLtch_Stat : 14|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ DrRLtch_FL_Stat : 6|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ DrRLtch_FR_Stat : 4|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ DrRLtch_RL_Stat : 2|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ DrRLtch_RR_Stat : 0|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ EngHd_Stat : 12|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ LoBm_On_Rq : 39|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ HiBm_On : 38|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ Hrn_On : 29|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ IrLmp_D_Lt_Flt : 37|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ IrLmp_P_Rt_Flt : 36|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ LgtSens_Twlgt : 21|3@1+ (1,0) [0|7] "Steps" NEO |
||||
SG_ LgtSens_SNA : 20|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ LgtSens_Tunnel : 19|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ LgtSens_Flt : 18|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ LgtSens_Night : 17|1@1+ (1,0) [2|-1] "" NEO |
||||
SG_ ADL_LoBm_On_Rq : 16|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ LoBm_D_Lt_Flt : 35|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ LoBm_P_Rt_Flt : 34|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ MPkBrk_Stat : 27|1@1+ (1,0) [2|-1] "" NEO |
||||
SG_ RevGr_Engg : 32|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ StW_Cond_Stat : 48|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ Term54_Actv : 28|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ Trlr_Stat : 30|2@1+ (1,0) [4|-1] "" NEO |
||||
SG_ VTA_Alm_Actv : 10|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ WprOutsdPkPosn : 26|1@1+ (1,0) [0|1] "" NEO |
||||
|
||||
BO_ 760 MCU_gpsVehicleSpeed: 8 MCU |
||||
SG_ MCU_gpsHDOP : 0|8@1+ (0.10,0) [0|25.50] "1" NEO |
||||
SG_ MCU_gpsVehicleHeading : 8|16@1+ (0.007810,0) [0|511.828350] "deg" NEO |
||||
SG_ MCU_gpsVehicleSpeed : 24|16@1+ (0.003910,0) [0|256.241850] "km/hr" NEO |
||||
SG_ MCU_mppSpeedLimit : 51|5@1+ (5,0) [0|155] "kph/mph" NEO |
||||
SG_ MCU_speedLimitUnits : 41|1@1+ (1,0) [2|-1] "" NEO |
||||
SG_ MCU_userSpeedOffset : 42|6@1+ (1,-30) [-30|33] "kph/mph" NEO |
||||
SG_ MCU_userSpeedOffsetUnits : 40|1@1+ (1,0) [2|-1] "" NEO |
||||
|
||||
BO_ 904 MCU_clusterBacklightRequest: 3 NEO |
||||
SG_ MCU_clusterBacklightOn : 7|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ MCU_clusterBrightnessLevel : 8|8@1+ (0.5,0) [0|127.5] "%" NEO |
||||
SG_ MCU_clusterReadyForDrive : 6|1@1+ (1,0) [2|-1] "" NEO |
||||
SG_ MCU_clusterReadyForPowerOff : 5|1@1+ (1,0) [0|1] "" NEO |
||||
|
||||
BO_ 984 MCU_locationStatus: 8 MCU |
||||
SG_ MCU_gpsAccuracy : 56|7@1+ (0.200000003,0) [0|25.200000378] "m" NEO |
||||
SG_ MCU_latitude : 0|28@1- (0.000001,0) [-134.21772759734682|134.21772659734683] "deg" NEO |
||||
SG_ MCU_longitude : 28|28@1- (0.000001,0) [-268.43545519469365|268.43545419469365] "deg" NEO |
||||
|
||||
BO_ 840 GTW_status: 8 GTW |
||||
SG_ GTW_accGoingDown : 1|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ GTW_accRailReq : 15|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ GTW_brakePressed : 6|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ GTW_driveGoingDown : 0|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ GTW_driveRailReq : 7|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ GTW_driverIsLeaving : 2|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ GTW_driverPresent : 5|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ GTW_hvacGoingDown : 12|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ GTW_hvacRailReq : 14|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ GTW_icPowerOff : 3|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ GTW_notEnough12VForDrive : 4|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ GTW_preconditionRequest : 13|1@1+ (1,0) [0|1] "" NEO |
||||
SG_ GTW_statusChecksum : 56|8@1+ (1,0) [0|255] "" NEO |
||||
SG_ GTW_statusCounter : 52|4@1+ (1,0) [0|15] "" NEO |
||||
|
||||
VAL_ 3 StW_Angl 16383 "SNA" ; |
||||
VAL_ 3 StW_AnglSens_Id 2 "MUST" 0 "PSBL" 1 "SELF" ; |
||||
VAL_ 3 StW_AnglSens_Stat 2 "ERR" 3 "ERR_INI" 1 "INI" 0 "OK" ; |
||||
VAL_ 3 StW_AnglSpd 16383 "SNA" ; |
||||
VAL_ 14 StW_AnglHP 16383 "SNA" ; |
||||
VAL_ 14 StW_AnglHP_Spd 16383 "SNA" ; |
||||
VAL_ 14 StW_AnglHP_Sens_Stat 3 "SNA" 2 "ERR" 1 "INI" 0 "OK" ; |
||||
VAL_ 14 StW_AnglHP_Sens_Id 3 "SNA" 2 "KOSTAL" 1 "DELPHI" 0 "TEST" ; |
||||
VAL_ 69 SpdCtrlLvr_Stat 32 "DN_1ST" 16 "UP_1ST" 8 "DN_2ND" 4 "UP_2ND" 2 "RWD" 1 "FWD" 0 "IDLE" ; |
||||
VAL_ 69 DTR_Dist_Rq 255 "SNA" 200 "ACC_DIST_7" 166 "ACC_DIST_6" 133 "ACC_DIST_5" 100 "ACC_DIST_4" 66 "ACC_DIST_3" 33 "ACC_DIST_2" 0 "ACC_DIST_1" ; |
||||
VAL_ 69 TurnIndLvr_Stat 3 "SNA" 2 "RIGHT" 1 "LEFT" 0 "IDLE" ; |
||||
VAL_ 69 HiBmLvr_Stat 3 "SNA" 2 "HIBM_FLSH_ON_PSD" 1 "HIBM_ON_PSD" 0 "IDLE" ; |
||||
VAL_ 69 WprWashSw_Psd 3 "SNA" 2 "WASH" 1 "TIPWIPE" 0 "NPSD" ; |
||||
VAL_ 69 WprWash_R_Sw_Posn_V2 3 "SNA" 2 "WASH" 1 "INTERVAL" 0 "OFF" ; |
||||
VAL_ 69 StW_Lvr_Stat 4 "STW_BACK" 3 "STW_FWD" 2 "STW_DOWN" 1 "STW_UP" 0 "NPSD" ; |
||||
VAL_ 69 StW_Cond_Psd 3 "SNA" 2 "DOWN" 1 "UP" 0 "NPSD" ; |
||||
VAL_ 69 HrnSw_Psd 3 "SNA" 2 "NDEF2" 1 "PSD" 0 "NPSD" ; |
||||
VAL_ 69 StW_Sw00_Psd 1 "PRESSED" 0 "NOT_PRESSED_SNA" ; |
||||
VAL_ 69 StW_Sw01_Psd 1 "PRESSED" 0 "NOT_PRESSED_SNA" ; |
||||
VAL_ 69 StW_Sw03_Psd 1 "PRESSED" 0 "NOT_PRESSED_SNA" ; |
||||
VAL_ 69 StW_Sw04_Psd 1 "PRESSED" 0 "NOT_PRESSED_SNA" ; |
||||
VAL_ 69 WprSw6Posn 7 "SNA" 6 "STAGE2" 5 "STAGE1" 4 "INTERVAL4" 3 "INTERVAL3" 2 "INTERVAL2" 1 "INTERVAL1" 0 "OFF" ;VAL_ 257 GTW_epasControlType 0 "WITHOUT" 1 "WITH_ANGLE" 3 "WITH_BOTH" 2 "WITH_TORQUE" ; |
||||
VAL_ 109 StW_Sw_Stat3 7 "SNA" 6 "NDEF6" 5 "NDEF5" 4 "NDEF4" 3 "PLUS_MINUS" 2 "MINUS" 1 "PLUS" 0 "NPSD" ; |
||||
VAL_ 109 MsgTxmtId 3 "NDEF3" 2 "NDEF2" 1 "SCCM" 0 "EWM" ; |
||||
VAL_ 109 TSL_RND_Posn_StW 15 "SNA" 8 "D" 6 "INI" 4 "N_DOWN" 2 "N_UP" 1 "R" 0 "IDLE" ; |
||||
VAL_ 109 TSL_P_Psd_StW 3 "SNA" 2 "INI" 1 "PSD" 0 "IDLE" ; |
||||
VAL_ 257 GTW_epasEmergencyOn 1 "EMERGENCY_POWER" 0 "NONE" ; |
||||
VAL_ 257 GTW_epasLDWEnabled 1 "ALLOWED" 0 "INHIBITED" ; |
||||
VAL_ 257 GTW_epasPowerMode 0 "DRIVE_OFF" 1 "DRIVE_ON" 3 "LOAD_SHED" 2 "SHUTTING_DOWN" 15 "SNA" ; |
||||
VAL_ 257 GTW_epasTuneRequest 1 "DM_COMFORT" 3 "DM_SPORT" 2 "DM_STANDARD" 0 "FAIL_SAFE_DEFAULT" 4 "RWD_COMFORT" 6 "RWD_SPORT" 5 "RWD_STANDARD" 7 "SNA" ; |
||||
VAL_ 264 DI_torqueDriver -4096 "SNA" ; |
||||
VAL_ 264 DI_torqueMotor -4096 "SNA" ; |
||||
VAL_ 264 DI_soptState 7 "SOPT_TEST_SNA" 4 "SOPT_TEST_NOT_RUN" 3 "SOPT_TEST_PASSED" 2 "SOPT_TEST_FAILED" 1 "SOPT_TEST_IN_PROGRESS" 0 "SOPT_PRE_TEST" ; |
||||
VAL_ 264 DI_motorRPM -32768 "SNA" ; |
||||
VAL_ 264 DI_pedalPos 255 "SNA" ; |
||||
VAL_ 280 DI_torqueEstimate -2048 "SNA" ; |
||||
VAL_ 280 DI_gear 7 "DI_GEAR_SNA" 4 "DI_GEAR_D" 3 "DI_GEAR_N" 2 "DI_GEAR_R" 1 "DI_GEAR_P" 0 "DI_GEAR_INVALID" ; |
||||
VAL_ 280 DI_brakePedal 1 "Applied" 0 "Not_applied" ; |
||||
VAL_ 280 DI_vehicleSpeed 4095 "SNA" ; |
||||
VAL_ 280 DI_gearRequest 7 "DI_GEAR_SNA" 4 "DI_GEAR_D" 3 "DI_GEAR_N" 2 "DI_GEAR_R" 1 "DI_GEAR_P" 0 "DI_GEAR_INVALID" ; |
||||
VAL_ 280 DI_torqueInterfaceFailure 1 "TORQUE_INTERFACE_FAILED" 0 "TORQUE_INTERFACE_NORMAL" ; |
||||
VAL_ 280 DI_brakePedalState 3 "SNA" 2 "INVALID" 1 "ON" 0 "OFF" ; |
||||
VAL_ 280 DI_epbParkRequest 1 "Park_requested" 0 "No_request" ; |
||||
VAL_ 280 DI_epbInterfaceReady 1 "EPB_INTERFACE_READY" 0 "EPB_INTERFACE_NOT_READY" ; |
||||
VAL_ 309 ESP_absBrakeEvent 1 "ACTIVE" 0 "NOT_ACTIVE" ; |
||||
VAL_ 309 ESP_brakeDiscWipingActive 1 "ACTIVE" 0 "INACTIVE" ; |
||||
VAL_ 309 ESP_brakeLamp 0 "OFF" 1 "ON" ; |
||||
VAL_ 309 ESP_espFaultLamp 0 "OFF" 1 "ON" ; |
||||
VAL_ 309 ESP_espLampFlash 1 "FLASH" 0 "OFF" ; |
||||
VAL_ 309 ESP_hillStartAssistActive 1 "ACTIVE" 0 "INACTIVE" 2 "NOT_AVAILABLE" 3 "SNA" ; |
||||
VAL_ 309 ESP_absFaultLamp 0 "OFF" 1 "ON" ; |
||||
VAL_ 309 ESP_espOffLamp 0 "OFF" 1 "ON" ; |
||||
VAL_ 309 ESP_stabilityControlSts 2 "ENGAGED" 3 "FAULTED" 5 "INIT" 4 "NOT_CONFIGURED" 0 "OFF" 1 "ON" ; |
||||
VAL_ 309 ESP_tcLampFlash 1 "FLASH" 0 "OFF" ; |
||||
VAL_ 760 MCU_speedLimitUnits 1 "KPH" 0 "MPH" ; |
||||
VAL_ 760 MCU_userSpeedOffsetUnits 1 "KPH" 0 "MPH" ; |
||||
VAL_ 643 AirTemp_Insd 255 "SNA" ; |
||||
VAL_ 643 AirTemp_Outsd 254 "INIT" 255 "SNA" ; |
||||
VAL_ 643 Bckl_Sw_RL_Stat_SAM_R 2 "FLT" 1 "NOT" 0 "OK" 3 "SNA" ; |
||||
VAL_ 643 Bckl_Sw_RM_Stat_SAM_R 2 "FLT" 1 "NOT" 0 "OK" 3 "SNA" ; |
||||
VAL_ 643 Bckl_Sw_RR_Stat_SAM_R 2 "FLT" 1 "NOT" 0 "OK" 3 "SNA" ; |
||||
VAL_ 643 DL_RLtch_Stat 1 "CLS" 0 "NDEF0" 2 "OPN" 3 "SNA" ; |
||||
VAL_ 643 DrRLtch_FL_Stat 1 "CLS" 0 "NDEF0" 2 "OPN" 3 "SNA" ; |
||||
VAL_ 643 DrRLtch_FR_Stat 1 "CLS" 0 "NDEF0" 2 "OPN" 3 "SNA" ; |
||||
VAL_ 643 DrRLtch_RL_Stat 1 "CLS" 0 "NDEF0" 2 "OPN" 3 "SNA" ; |
||||
VAL_ 643 DrRLtch_RR_Stat 1 "CLS" 0 "NDEF0" 2 "OPN" 3 "SNA" ; |
||||
VAL_ 643 EngHd_Stat 1 "CLS" 0 "NDEF0" 2 "OPN" 3 "SNA" ; |
||||
VAL_ 643 LgtSens_Night 0 "DAY" 1 "NIGHT" ; |
||||
VAL_ 643 MPkBrk_Stat 1 "ENGG" 0 "RELS" ; |
||||
VAL_ 643 RevGr_Engg 0 "DISENGG" 1 "ENGG" 2 "NDEF2" 3 "SNA" ; |
||||
VAL_ 643 StW_Cond_Stat 3 "BLINK" 1 "NDEF1" 0 "OFF" 2 "ON" ; |
||||
VAL_ 643 Trlr_Stat 2 "NDEF2" 0 "NONE" 1 "OK" 3 "SNA" ; |
||||
VAL_ 792 BOOT_STATE 2 "Init" 3 "SNA" 0 "closed" 1 "open" ; |
||||
VAL_ 792 CERRD 1 "CAN error detect" 0 "no Can error detected" ; |
||||
VAL_ 792 DAY 1 "Init" 0 "SNA" ; |
||||
VAL_ 792 DOOR_STATE_FL 2 "Init" 3 "SNA" 0 "closed" 1 "open" ; |
||||
VAL_ 792 DOOR_STATE_FR 2 "Init" 3 "SNA" 0 "closed" 1 "open" ; |
||||
VAL_ 792 DOOR_STATE_FrontTrunk 2 "Init" 3 "SNA" 0 "closed" 1 "open" ; |
||||
VAL_ 792 DOOR_STATE_RL 2 "Init" 3 "SNA" 0 "closed" 1 "open" ; |
||||
VAL_ 792 DOOR_STATE_RR 2 "Init" 3 "SNA" 0 "closed" 1 "open" ; |
||||
VAL_ 792 GTW_updateInProgress 1 "IN_PROGRESS" 2 "IN_PROGRESS_NOT_USED" 3 "IN_PROGRESS_SNA" 0 "NOT_IN_PROGRESS" ; |
||||
VAL_ 792 Hour 30 "Init" 31 "SNA" ; |
||||
VAL_ 792 MCU_factoryMode 1 "FACTORY_MODE" 0 "NORMAL_MODE" ; |
||||
VAL_ 792 MCU_transportModeOn 0 "NORMAL_MODE" ; |
||||
VAL_ 792 MINUTE 62 "Init" 63 "SNA" ; |
||||
VAL_ 792 MONTH 1 "Init" 15 "SNA" ; |
||||
VAL_ 792 SECOND 62 "Init" 63 "SNA" ; |
||||
VAL_ 792 YEAR 126 "Init" 127 "SNA" ; |
||||
VAL_ 872 DI_aebState 2 "ENABLED" 4 "FAULT" 7 "SNA" 1 "STANDBY" 3 "STANDSTILL" 0 "UNAVAILABLE" ; |
||||
VAL_ 872 DI_analogSpeed 4095 "SNA" ; |
||||
VAL_ 872 DI_cruiseState 2 "ENABLED" 5 "FAULT" 0 "OFF" 4 "OVERRIDE" 7 "PRE_CANCEL" 6 "PRE_FAULT" 1 "STANDBY" 3 "STANDSTILL" ; |
||||
VAL_ 872 DI_digitalSpeed 255 "SNA" ; |
||||
VAL_ 872 DI_immobilizerState 2 "AUTHENTICATING" 3 "DISARMED" 6 "FAULT" 4 "IDLE" 0 "INIT_SNA" 1 "REQUEST" 5 "RESET" ; |
||||
VAL_ 872 DI_speedUnits 1 "KPH" 0 "MPH" ; |
||||
VAL_ 872 DI_state 3 "ABORT" 4 "ENABLE" 2 "FAULT" 1 "STANDBY" 0 "UNAVAILABLE" ; |
||||
VAL_ 872 DI_systemState 3 "ABORT" 4 "ENABLE" 2 "FAULT" 1 "STANDBY" 0 "UNAVAILABLE" ; |
||||
VAL_ 872 DI_vehicleHoldState 2 "BLEND_IN" 4 "BLEND_OUT" 6 "FAULT" 7 "INIT" 5 "PARK" 1 "STANDBY" 3 "STANDSTILL" 0 "UNAVAILABLE" ; |
||||
VAL_ 880 EPAS_currentTuneMode 1 "DM_COMFORT" 3 "DM_SPORT" 2 "DM_STANDARD" 0 "FAIL_SAFE_DEFAULT" 4 "RWD_COMFORT" 6 "RWD_SPORT" 5 "RWD_STANDARD" 7 "UNAVAILABLE" ; |
||||
VAL_ 880 EPAS_eacErrorCode 14 "EAC_ERROR_EPB_INHIBIT" 3 "EAC_ERROR_HANDS_ON" 7 "EAC_ERROR_HIGH_ANGLE_RATE_REQ" 9 "EAC_ERROR_HIGH_ANGLE_RATE_SAFETY" 6 "EAC_ERROR_HIGH_ANGLE_REQ" 8 "EAC_ERROR_HIGH_ANGLE_SAFETY" 10 "EAC_ERROR_HIGH_MMOT_SAFETY" 11 "EAC_ERROR_HIGH_TORSION_SAFETY" 0 "EAC_ERROR_IDLE" 12 "EAC_ERROR_LOW_ASSIST" 2 "EAC_ERROR_MAX_SPEED" 1 "EAC_ERROR_MIN_SPEED" 13 "EAC_ERROR_PINION_VEL_DIFF" 4 "EAC_ERROR_TMP_FAULT" 5 "EAR_ERROR_MAX_STEER_DELTA" 15 "SNA" ; |
||||
VAL_ 880 EPAS_eacStatus 2 "EAC_ACTIVE" 1 "EAC_AVAILABLE" 3 "EAC_FAULT" 0 "EAC_INHIBITED" 4 "SNA" ; |
||||
VAL_ 880 EPAS_handsOnLevel 0 "0" 1 "1" 2 "2" 3 "3" ; |
||||
VAL_ 880 EPAS_steeringFault 1 "FAULT" 0 "NO_FAULT" ; |
||||
VAL_ 880 EPAS_steeringRackForce 1022 "NOT_IN_SPEC" 1023 "SNA" ; |
||||
VAL_ 880 EPAS_steeringReduced 0 "NORMAL_ASSIST" 1 "REDUCED_ASSIST" ; |
||||
VAL_ 880 EPAS_torsionBarTorque 0 "SEE_SPECIFICATION" 4095 "SNA" 4094 "UNDEFINABLE_DATA" ; |
||||
VAL_ 904 MCU_clusterReadyForDrive 0 "NO_SNA" 1 "YES" ; |
||||
VAL_ 1160 DAS_steeringAngleRequest 16384 "ZERO_ANGLE" ; |
||||
VAL_ 1160 DAS_steeringControlType 1 "ANGLE_CONTROL" 3 "DISABLED" 0 "NONE" 2 "RESERVED" ; |
||||
VAL_ 1160 DAS_steeringHapticRequest 1 "ACTIVE" 0 "IDLE" ; |
@ -0,0 +1 @@ |
||||
Subproject commit 49c1e9c3da524bf32735e0d2f1cb9df4d62f0e36 |
@ -0,0 +1,426 @@ |
||||
/* vim: set sw=8 ts=8 sts=8 noet: */ |
||||
/* capnp_c.h
|
||||
* |
||||
* Copyright (C) 2013 James McKaskill |
||||
* Copyright (C) 2014 Steve Dee |
||||
* |
||||
* This software may be modified and distributed under the terms |
||||
* of the MIT license. See the LICENSE file for details. |
||||
*/ |
||||
|
||||
#ifndef CAPNP_C_H |
||||
#define CAPNP_C_H |
||||
|
||||
#include <stdint.h> |
||||
#include <stdio.h> |
||||
#if defined(unix) && !defined(__APPLE__) |
||||
#include <endian.h> |
||||
#endif |
||||
|
||||
// ssize_t is not defined in stdint.h in MSVC.
|
||||
#ifdef _MSC_VER |
||||
typedef intmax_t ssize_t; |
||||
#endif |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
#if defined(__cplusplus) || (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) |
||||
#define CAPN_INLINE static inline |
||||
#else |
||||
#define CAPN_INLINE static |
||||
#endif |
||||
|
||||
#define CAPN_VERSION 1 |
||||
|
||||
/* struct capn is a common structure shared between segments in the same
|
||||
* session/context so that far pointers between segments will be created. |
||||
* |
||||
* lookup is used to lookup segments by id when derefencing a far pointer |
||||
* |
||||
* create is used to create or lookup an alternate segment that has at least |
||||
* sz available (ie returned seg->len + sz <= seg->cap) |
||||
* |
||||
* create_local is used to create a segment for the copy tree and should be |
||||
* allocated in the local memory space. |
||||
* |
||||
* Allocated segments must be zero initialized. |
||||
* |
||||
* create and lookup can be NULL if you don't need multiple segments and don't |
||||
* want to support copying |
||||
* |
||||
* seglist and copylist are linked lists which can be used to free up segments |
||||
* on cleanup, but should not be modified by the user. |
||||
* |
||||
* lookup, create, create_local, and user can be set by the user. Other values |
||||
* should be zero initialized. |
||||
*/ |
||||
struct capn { |
||||
/* user settable */ |
||||
struct capn_segment *(*lookup)(void* /*user*/, uint32_t /*id */); |
||||
struct capn_segment *(*create)(void* /*user*/, uint32_t /*id */, int /*sz*/); |
||||
struct capn_segment *(*create_local)(void* /*user*/, int /*sz*/); |
||||
void *user; |
||||
/* zero initialized, user should not modify */ |
||||
uint32_t segnum; |
||||
struct capn_tree *copy; |
||||
struct capn_tree *segtree; |
||||
struct capn_segment *seglist, *lastseg; |
||||
struct capn_segment *copylist; |
||||
}; |
||||
|
||||
/* struct capn_tree is a rb tree header used internally for the segment id
|
||||
* lookup and copy tree */ |
||||
struct capn_tree { |
||||
struct capn_tree *parent, *link[2]; |
||||
unsigned int red : 1; |
||||
}; |
||||
|
||||
struct capn_tree *capn_tree_insert(struct capn_tree *root, struct capn_tree *n); |
||||
|
||||
/* struct capn_segment contains the information about a single segment.
|
||||
* |
||||
* capn points to a struct capn that is shared between segments in the |
||||
* same session |
||||
* |
||||
* id specifies the segment id, used for far pointers |
||||
* |
||||
* data specifies the segment data. This should not move after creation. |
||||
* |
||||
* len specifies the current segment length. This is 0 for a blank |
||||
* segment. |
||||
* |
||||
* cap specifies the segment capacity. |
||||
* |
||||
* When creating new structures len will be incremented until it reaces cap, |
||||
* at which point a new segment will be requested via capn->create. The |
||||
* create callback can either create a new segment or expand an existing |
||||
* one by incrementing cap and returning the expanded segment. |
||||
* |
||||
* data, len, and cap must all by 8 byte aligned |
||||
* |
||||
* data, len, cap, and user should all set by the user. Other values |
||||
* should be zero initialized. |
||||
*/ |
||||
#ifdef _MSC_VER |
||||
__declspec(align(64)) |
||||
#endif |
||||
struct capn_segment { |
||||
struct capn_tree hdr; |
||||
struct capn_segment *next; |
||||
struct capn *capn; |
||||
uint32_t id; |
||||
/* user settable */ |
||||
char *data; |
||||
size_t len, cap; |
||||
void *user; |
||||
}; |
||||
|
||||
enum CAPN_TYPE { |
||||
CAPN_NULL = 0, |
||||
CAPN_STRUCT = 1, |
||||
CAPN_LIST = 2, |
||||
CAPN_PTR_LIST = 3, |
||||
CAPN_BIT_LIST = 4, |
||||
CAPN_FAR_POINTER = 5, |
||||
}; |
||||
|
||||
struct capn_ptr { |
||||
unsigned int type : 4; |
||||
unsigned int has_ptr_tag : 1; |
||||
unsigned int is_list_member : 1; |
||||
unsigned int is_composite_list : 1; |
||||
unsigned int datasz : 19; |
||||
unsigned int ptrs : 16; |
||||
int len; |
||||
char *data; |
||||
struct capn_segment *seg; |
||||
}; |
||||
|
||||
struct capn_text { |
||||
int len; |
||||
const char *str; |
||||
struct capn_segment *seg; |
||||
}; |
||||
|
||||
typedef struct capn_ptr capn_ptr; |
||||
typedef struct capn_text capn_text; |
||||
typedef struct {capn_ptr p;} capn_data; |
||||
typedef struct {capn_ptr p;} capn_list1; |
||||
typedef struct {capn_ptr p;} capn_list8; |
||||
typedef struct {capn_ptr p;} capn_list16; |
||||
typedef struct {capn_ptr p;} capn_list32; |
||||
typedef struct {capn_ptr p;} capn_list64; |
||||
|
||||
struct capn_msg { |
||||
struct capn_segment *seg; |
||||
uint64_t iface; |
||||
uint16_t method; |
||||
capn_ptr args; |
||||
}; |
||||
|
||||
/* capn_append_segment appends a segment to a session */ |
||||
void capn_append_segment(struct capn*, struct capn_segment*); |
||||
|
||||
capn_ptr capn_root(struct capn *c); |
||||
void capn_resolve(capn_ptr *p); |
||||
|
||||
#define capn_len(list) ((list).p.type == CAPN_FAR_POINTER ? (capn_resolve(&(list).p), (list).p.len) : (list).p.len) |
||||
|
||||
/* capn_getp|setp functions get/set ptrs in list/structs
|
||||
* off is the list index or pointer index in a struct |
||||
* capn_setp will copy the data, create far pointers, etc if the target |
||||
* is in a different segment/context. |
||||
* Both of these will use/return inner pointers for composite lists. |
||||
*/ |
||||
capn_ptr capn_getp(capn_ptr p, int off, int resolve); |
||||
int capn_setp(capn_ptr p, int off, capn_ptr tgt); |
||||
|
||||
capn_text capn_get_text(capn_ptr p, int off, capn_text def); |
||||
capn_data capn_get_data(capn_ptr p, int off); |
||||
int capn_set_text(capn_ptr p, int off, capn_text tgt); |
||||
|
||||
/* capn_get* functions get data from a list
|
||||
* The length of the list is given by p->size |
||||
* off specifies how far into the list to start |
||||
* sz indicates the number of elements to get |
||||
* The function returns the number of elements read or -1 on an error. |
||||
* off must be byte aligned for capn_getv1 |
||||
*/ |
||||
int capn_get1(capn_list1 p, int off); |
||||
uint8_t capn_get8(capn_list8 p, int off); |
||||
uint16_t capn_get16(capn_list16 p, int off); |
||||
uint32_t capn_get32(capn_list32 p, int off); |
||||
uint64_t capn_get64(capn_list64 p, int off); |
||||
int capn_getv1(capn_list1 p, int off, uint8_t *data, int sz); |
||||
int capn_getv8(capn_list8 p, int off, uint8_t *data, int sz); |
||||
int capn_getv16(capn_list16 p, int off, uint16_t *data, int sz); |
||||
int capn_getv32(capn_list32 p, int off, uint32_t *data, int sz); |
||||
int capn_getv64(capn_list64 p, int off, uint64_t *data, int sz); |
||||
|
||||
/* capn_set* functions set data in a list
|
||||
* off specifies how far into the list to start |
||||
* sz indicates the number of elements to write |
||||
* The function returns the number of elemnts written or -1 on an error. |
||||
* off must be byte aligned for capn_setv1 |
||||
*/ |
||||
int capn_set1(capn_list1 p, int off, int v); |
||||
int capn_set8(capn_list8 p, int off, uint8_t v); |
||||
int capn_set16(capn_list16 p, int off, uint16_t v); |
||||
int capn_set32(capn_list32 p, int off, uint32_t v); |
||||
int capn_set64(capn_list64 p, int off, uint64_t v); |
||||
int capn_setv1(capn_list1 p, int off, const uint8_t *data, int sz); |
||||
int capn_setv8(capn_list8 p, int off, const uint8_t *data, int sz); |
||||
int capn_setv16(capn_list16 p, int off, const uint16_t *data, int sz); |
||||
int capn_setv32(capn_list32 p, int off, const uint32_t *data, int sz); |
||||
int capn_setv64(capn_list64 p, int off, const uint64_t *data, int sz); |
||||
|
||||
/* capn_new_* functions create a new object
|
||||
* datasz is in bytes, ptrs is # of pointers, sz is # of elements in the list |
||||
* On an error a CAPN_NULL pointer is returned |
||||
*/ |
||||
capn_ptr capn_new_string(struct capn_segment *seg, const char *str, ssize_t sz); |
||||
capn_ptr capn_new_struct(struct capn_segment *seg, int datasz, int ptrs); |
||||
capn_ptr capn_new_interface(struct capn_segment *seg, int datasz, int ptrs); |
||||
capn_ptr capn_new_ptr_list(struct capn_segment *seg, int sz); |
||||
capn_ptr capn_new_list(struct capn_segment *seg, int sz, int datasz, int ptrs); |
||||
capn_list1 capn_new_list1(struct capn_segment *seg, int sz); |
||||
capn_list8 capn_new_list8(struct capn_segment *seg, int sz); |
||||
capn_list16 capn_new_list16(struct capn_segment *seg, int sz); |
||||
capn_list32 capn_new_list32(struct capn_segment *seg, int sz); |
||||
capn_list64 capn_new_list64(struct capn_segment *seg, int sz); |
||||
|
||||
/* capn_read|write* functions read/write struct values
|
||||
* off is the offset into the structure in bytes |
||||
* Rarely should these be called directly, instead use the generated code. |
||||
* Data must be xored with the default value |
||||
* These are inlined |
||||
*/ |
||||
CAPN_INLINE uint8_t capn_read8(capn_ptr p, int off); |
||||
CAPN_INLINE uint16_t capn_read16(capn_ptr p, int off); |
||||
CAPN_INLINE uint32_t capn_read32(capn_ptr p, int off); |
||||
CAPN_INLINE uint64_t capn_read64(capn_ptr p, int off); |
||||
CAPN_INLINE int capn_write1(capn_ptr p, int off, int val); |
||||
CAPN_INLINE int capn_write8(capn_ptr p, int off, uint8_t val); |
||||
CAPN_INLINE int capn_write16(capn_ptr p, int off, uint16_t val); |
||||
CAPN_INLINE int capn_write32(capn_ptr p, int off, uint32_t val); |
||||
CAPN_INLINE int capn_write64(capn_ptr p, int off, uint64_t val); |
||||
|
||||
/* capn_init_malloc inits the capn struct with a create function which
|
||||
* allocates segments on the heap using malloc |
||||
* |
||||
* capn_init_(fp|mem) inits by reading segments in from the file/memory buffer |
||||
* in serialized form (optionally packed). It will then setup the create |
||||
* function ala capn_init_malloc so that further segments can be created. |
||||
* |
||||
* capn_free frees all the segment headers and data created by the create |
||||
* function setup by capn_init_* |
||||
*/ |
||||
void capn_init_malloc(struct capn *c); |
||||
int capn_init_fp(struct capn *c, FILE *f, int packed); |
||||
int capn_init_mem(struct capn *c, const uint8_t *p, size_t sz, int packed); |
||||
|
||||
/* capn_write_(fp|mem) writes segments to the file/memory buffer in
|
||||
* serialized form and returns the number of bytes written. |
||||
*/ |
||||
/* TODO */ |
||||
/*int capn_write_fp(struct capn *c, FILE *f, int packed);*/ |
||||
int capn_write_fd(struct capn *c, ssize_t (*write_fd)(int fd, void *p, size_t count), int fd, int packed); |
||||
int capn_write_mem(struct capn *c, uint8_t *p, size_t sz, int packed); |
||||
|
||||
void capn_free(struct capn *c); |
||||
void capn_reset_copy(struct capn *c); |
||||
|
||||
/* Inline functions */ |
||||
|
||||
|
||||
CAPN_INLINE uint8_t capn_flip8(uint8_t v) { |
||||
return v; |
||||
} |
||||
CAPN_INLINE uint16_t capn_flip16(uint16_t v) { |
||||
#if defined(__BYTE_ORDER) && (__BYTE_ORDER == __LITTLE_ENDIAN) |
||||
return v; |
||||
#elif defined(__BYTE_ORDER) && (__BYTE_ORDER == __BIG_ENDIAN) && \ |
||||
defined(__GNUC__) && __GNUC__ >= 4 && __GNUC_MINOR__ >= 8 |
||||
return __builtin_bswap16(v); |
||||
#else |
||||
union { uint16_t u; uint8_t v[2]; } s; |
||||
s.v[0] = (uint8_t)v; |
||||
s.v[1] = (uint8_t)(v>>8); |
||||
return s.u; |
||||
#endif |
||||
} |
||||
CAPN_INLINE uint32_t capn_flip32(uint32_t v) { |
||||
#if defined(__BYTE_ORDER) && (__BYTE_ORDER == __LITTLE_ENDIAN) |
||||
return v; |
||||
#elif defined(__BYTE_ORDER) && (__BYTE_ORDER == __BIG_ENDIAN) && \ |
||||
defined(__GNUC__) && __GNUC__ >= 4 && __GNUC_MINOR__ >= 8 |
||||
return __builtin_bswap32(v); |
||||
#else |
||||
union { uint32_t u; uint8_t v[4]; } s; |
||||
s.v[0] = (uint8_t)v; |
||||
s.v[1] = (uint8_t)(v>>8); |
||||
s.v[2] = (uint8_t)(v>>16); |
||||
s.v[3] = (uint8_t)(v>>24); |
||||
return s.u; |
||||
#endif |
||||
} |
||||
CAPN_INLINE uint64_t capn_flip64(uint64_t v) { |
||||
#if defined(__BYTE_ORDER) && (__BYTE_ORDER == __LITTLE_ENDIAN) |
||||
return v; |
||||
#elif defined(__BYTE_ORDER) && (__BYTE_ORDER == __BIG_ENDIAN) && \ |
||||
defined(__GNUC__) && __GNUC__ >= 4 && __GNUC_MINOR__ >= 8 |
||||
return __builtin_bswap64(v); |
||||
#else |
||||
union { uint64_t u; uint8_t v[8]; } s; |
||||
s.v[0] = (uint8_t)v; |
||||
s.v[1] = (uint8_t)(v>>8); |
||||
s.v[2] = (uint8_t)(v>>16); |
||||
s.v[3] = (uint8_t)(v>>24); |
||||
s.v[4] = (uint8_t)(v>>32); |
||||
s.v[5] = (uint8_t)(v>>40); |
||||
s.v[6] = (uint8_t)(v>>48); |
||||
s.v[7] = (uint8_t)(v>>56); |
||||
return s.u; |
||||
#endif |
||||
} |
||||
|
||||
CAPN_INLINE int capn_write1(capn_ptr p, int off, int val) { |
||||
if (off >= p.datasz*8) { |
||||
return -1; |
||||
} else if (val) { |
||||
uint8_t tmp = (uint8_t)(1 << (off & 7)); |
||||
((uint8_t*) p.data)[off >> 3] |= tmp; |
||||
return 0; |
||||
} else { |
||||
uint8_t tmp = (uint8_t)(~(1 << (off & 7))); |
||||
((uint8_t*) p.data)[off >> 3] &= tmp; |
||||
return 0; |
||||
} |
||||
} |
||||
|
||||
CAPN_INLINE uint8_t capn_read8(capn_ptr p, int off) { |
||||
return off+1 <= p.datasz ? capn_flip8(*(uint8_t*) (p.data+off)) : 0; |
||||
} |
||||
CAPN_INLINE int capn_write8(capn_ptr p, int off, uint8_t val) { |
||||
if (off+1 <= p.datasz) { |
||||
*(uint8_t*) (p.data+off) = capn_flip8(val); |
||||
return 0; |
||||
} else { |
||||
return -1; |
||||
} |
||||
} |
||||
|
||||
CAPN_INLINE uint16_t capn_read16(capn_ptr p, int off) { |
||||
return off+2 <= p.datasz ? capn_flip16(*(uint16_t*) (p.data+off)) : 0; |
||||
} |
||||
CAPN_INLINE int capn_write16(capn_ptr p, int off, uint16_t val) { |
||||
if (off+2 <= p.datasz) { |
||||
*(uint16_t*) (p.data+off) = capn_flip16(val); |
||||
return 0; |
||||
} else { |
||||
return -1; |
||||
} |
||||
} |
||||
|
||||
CAPN_INLINE uint32_t capn_read32(capn_ptr p, int off) { |
||||
return off+4 <= p.datasz ? capn_flip32(*(uint32_t*) (p.data+off)) : 0; |
||||
} |
||||
CAPN_INLINE int capn_write32(capn_ptr p, int off, uint32_t val) { |
||||
if (off+4 <= p.datasz) { |
||||
*(uint32_t*) (p.data+off) = capn_flip32(val); |
||||
return 0; |
||||
} else { |
||||
return -1; |
||||
} |
||||
} |
||||
|
||||
CAPN_INLINE uint64_t capn_read64(capn_ptr p, int off) { |
||||
return off+8 <= p.datasz ? capn_flip64(*(uint64_t*) (p.data+off)) : 0; |
||||
} |
||||
CAPN_INLINE int capn_write64(capn_ptr p, int off, uint64_t val) { |
||||
if (off+8 <= p.datasz) { |
||||
*(uint64_t*) (p.data+off) = capn_flip64(val); |
||||
return 0; |
||||
} else { |
||||
return -1; |
||||
} |
||||
} |
||||
|
||||
union capn_conv_f32 { |
||||
uint32_t u; |
||||
float f; |
||||
}; |
||||
|
||||
union capn_conv_f64 { |
||||
uint64_t u; |
||||
double f; |
||||
}; |
||||
|
||||
CAPN_INLINE float capn_to_f32(uint32_t v) { |
||||
union capn_conv_f32 u; |
||||
u.u = v; |
||||
return u.f; |
||||
} |
||||
CAPN_INLINE double capn_to_f64(uint64_t v) { |
||||
union capn_conv_f64 u; |
||||
u.u = v; |
||||
return u.f; |
||||
} |
||||
CAPN_INLINE uint32_t capn_from_f32(float v) { |
||||
union capn_conv_f32 u; |
||||
u.f = v; |
||||
return u.u; |
||||
} |
||||
CAPN_INLINE uint64_t capn_from_f64(double v) { |
||||
union capn_conv_f64 u; |
||||
u.f = v; |
||||
return u.u; |
||||
} |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif |
@ -1,208 +0,0 @@ |
||||
import numpy as np |
||||
|
||||
import common.filters as filters |
||||
from selfdrive.controls.lib.latcontrol import calc_curvature |
||||
|
||||
|
||||
# Calibration Status |
||||
class CalibStatus(object): |
||||
INCOMPLETE = 0 |
||||
VALID = 1 |
||||
INVALID = 2 |
||||
|
||||
|
||||
def line_intersection(line1, line2, no_int_sub = [0,0]): |
||||
xdiff = (line1[0][0] - line1[1][0], line2[0][0] - line2[1][0]) |
||||
ydiff = (line1[0][1] - line1[1][1], line2[0][1] - line2[1][1]) |
||||
|
||||
def det(a, b): |
||||
return a[0] * b[1] - a[1] * b[0] |
||||
|
||||
div = det(xdiff, ydiff) |
||||
if div == 0: |
||||
# since we are in float domain, this should really never happen |
||||
return no_int_sub |
||||
|
||||
d = (det(*line1), det(*line2)) |
||||
x = det(d, xdiff) / div |
||||
y = det(d, ydiff) / div |
||||
return [x, y] |
||||
|
||||
def points_inside_hit_box(pts, box): |
||||
"""Determine which points lie inside a box. |
||||
|
||||
Inputs: |
||||
pts: An nx2 array of points to hit test. |
||||
box: An array [[x_left, y_top], [x_right, y_bottom]] describing a box to |
||||
use for hit testing. |
||||
Returns: |
||||
A logical array with true for every member of pts inside box. |
||||
""" |
||||
hits = np.all(np.logical_and(pts > box[0, :], pts < box[1, :]), axis=1) |
||||
return hits |
||||
|
||||
def warp_points(pt_s, warp_matrix): |
||||
# pt_s are the source points, nx2 array. |
||||
pt_d = np.dot(warp_matrix[:, :2], pt_s.T) + warp_matrix[:, 2][:, np.newaxis] |
||||
|
||||
# divide by third dimension for representation in image space. |
||||
return (pt_d[:2, :] / pt_d[2, :]).T |
||||
|
||||
class ViewCalibrator(object): |
||||
def __init__(self, box_size, big_box_size, vp_r, warp_matrix_start, vp_f=None, cal_cycle=0, cal_status=0): |
||||
self.calibration_threshold = 3000 |
||||
self.box_size = box_size |
||||
self.big_box_size = big_box_size |
||||
|
||||
self.warp_matrix_start = warp_matrix_start |
||||
self.vp_r = list(vp_r) |
||||
|
||||
if vp_f is None: |
||||
self.vp_f = list(vp_r) |
||||
else: |
||||
self.vp_f = list(vp_f) |
||||
|
||||
# slow filter fot the vanishing point |
||||
vp_fr = 0.005 # Hz, slow filter |
||||
self.dt = 0.05 # camera runs at 20Hz |
||||
|
||||
self.update_warp_matrix() |
||||
|
||||
self.vp_x_filter = filters.FirstOrderLowpassFilter(vp_fr, self.dt, self.vp_f[0]) |
||||
self.vp_y_filter = filters.FirstOrderLowpassFilter(vp_fr, self.dt, self.vp_f[1]) |
||||
|
||||
self.cal_cycle = cal_cycle |
||||
self.cal_status = cal_status |
||||
self.cal_perc = int(np.minimum(self.cal_cycle*100./self.calibration_threshold, 100)) |
||||
|
||||
def vanishing_point_process(self, old_ps, new_ps, v_ego, steer_angle, VP): |
||||
# correct diffs by yaw rate |
||||
cam_fov = 23.06*np.pi/180. # deg |
||||
curvature = calc_curvature(v_ego, steer_angle, VP) |
||||
yaw_rate = curvature * v_ego |
||||
hor_angle_shift = yaw_rate * self.dt * self.box_size[0] / cam_fov |
||||
old_ps += [hor_angle_shift, 0] # old points have moved in the image due to yaw rate |
||||
|
||||
pos_ps = [None]*len(new_ps) |
||||
for ii in range(len(old_ps)): |
||||
xo = old_ps[ii][0] |
||||
yo = old_ps[ii][1] |
||||
yn = new_ps[ii][1] |
||||
|
||||
# don't consider points with low flow in y |
||||
if abs(yn - yo) > 1: |
||||
if xo > (self.vp_f[0] + 20): |
||||
pos_ps[ii] = 'r' # right lane point |
||||
elif xo < (self.vp_f[0] - 20): |
||||
pos_ps[ii] = 'l' # left lane point |
||||
|
||||
# intersect all the right lines with the left lines |
||||
idxs_l = [i for i, x in enumerate(pos_ps) if x == 'l'] |
||||
idxs_r = [i for i, x in enumerate(pos_ps) if x == 'r'] |
||||
|
||||
old_ps_l, new_ps_l = old_ps[idxs_l], new_ps[idxs_l] |
||||
old_ps_r, new_ps_r = old_ps[idxs_r], new_ps[idxs_r] |
||||
# return None if there is one side with no lines, the speed is low or the steer angle is high |
||||
if len(old_ps_l) == 0 or len(old_ps_r) == 0 or v_ego < 20 or abs(steer_angle) > 5: |
||||
return None |
||||
|
||||
int_ps = [[None] * len(old_ps_r)] * len(old_ps_l) |
||||
for ll in range(len(old_ps_l)): |
||||
for rr in range(len(old_ps_r)): |
||||
old_p_l, old_p_r, new_p_l, new_p_r = old_ps_l[ll], old_ps_r[ |
||||
rr], new_ps_l[ll], new_ps_r[rr] |
||||
line_l = [[old_p_l[0], old_p_l[1]], [new_p_l[0], new_p_l[1]]] |
||||
line_r = [[old_p_r[0], old_p_r[1]], [new_p_r[0], new_p_r[1]]] |
||||
int_ps[ll][rr] = line_intersection( |
||||
line_l, line_r, no_int_sub=self.vp_f) |
||||
# saturate outliers that are too far from the estimated vp |
||||
int_ps[ll][rr][0] = np.clip(int_ps[ll][rr][0], self.vp_f[0] - 20, self.vp_f[0] + 20) |
||||
int_ps[ll][rr][1] = np.clip(int_ps[ll][rr][1], self.vp_f[1] - 30, self.vp_f[1] + 30) |
||||
vp = np.mean(np.mean(np.array(int_ps), axis=0), axis=0) |
||||
|
||||
return vp |
||||
|
||||
def calibration_validity(self): |
||||
# this function sanity checks that the small box is contained in the big box. |
||||
# otherwise the warp function will generate black spots on the small box |
||||
cp = np.asarray([[0, 0], |
||||
[self.box_size[0], 0], |
||||
[self.box_size[0], self.box_size[1]], |
||||
[0, self.box_size[1]]]) |
||||
|
||||
cpw = warp_points(cp, self.warp_matrix) |
||||
|
||||
# pixel margin for validity hysteresys: |
||||
# - if calibration is good, keep it good until small box is inside the big box |
||||
# - if calibration isn't good, then make it good again if small box is in big box with margin |
||||
margin_px = 0 if self.cal_status == CalibStatus.VALID else 5 |
||||
big_hit_box = np.asarray( |
||||
[[margin_px, margin_px], |
||||
[self.big_box_size[0], self.big_box_size[1] - margin_px]]) |
||||
|
||||
cpw_outside_big_box = np.logical_not(points_inside_hit_box(cpw, big_hit_box)) |
||||
return not np.any(cpw_outside_big_box) |
||||
|
||||
|
||||
def get_calibration_hit_box(self): |
||||
"""Returns an axis-aligned hit box in canonical image space. |
||||
Points which do not fall within this box should not be used for |
||||
calibration. |
||||
|
||||
Returns: |
||||
An array [[x_left, y_top], [x_right, y_bottom]] describing a box inside |
||||
which all calibration points should lie. |
||||
""" |
||||
# We mainly care about feature from lanes, so removed points from sky. |
||||
y_filter = 50. |
||||
return np.asarray([[0, y_filter], [self.box_size[0], self.box_size[1]]]) |
||||
|
||||
|
||||
def update_warp_matrix(self): |
||||
translation_matrix = np.asarray( |
||||
[[1, 0, self.vp_f[0] - self.vp_r[0]], |
||||
[0, 1, self.vp_f[1] - self.vp_r[1]], |
||||
[0, 0, 1]]) |
||||
self.warp_matrix = np.dot(translation_matrix, self.warp_matrix_start) |
||||
self.warp_matrix_inv = np.linalg.inv(self.warp_matrix) |
||||
|
||||
def calibration(self, p0, p1, st, v_ego, steer_angle, VP): |
||||
# convert to np array first thing |
||||
p0 = np.asarray(p0) |
||||
p1 = np.asarray(p1) |
||||
st = np.asarray(st) |
||||
|
||||
p0 = p0.reshape((-1,2)) |
||||
p1 = p1.reshape((-1,2)) |
||||
|
||||
# filter out pts with bad status |
||||
p0 = p0[st==1] |
||||
p1 = p1[st==1] |
||||
|
||||
calib_hit_box = self.get_calibration_hit_box() |
||||
# remove all the points outside the small box and above the horizon line |
||||
good_idxs = points_inside_hit_box( |
||||
warp_points(p0, self.warp_matrix_inv), calib_hit_box) |
||||
p0 = p0[good_idxs] |
||||
p1 = p1[good_idxs] |
||||
|
||||
# print("unwarped points: {}".format(warp_points(p0, self.warp_matrix_inv))) |
||||
# print("good_idxs {}:".format(good_idxs)) |
||||
|
||||
# get instantaneous vp |
||||
vp = self.vanishing_point_process(p0, p1, v_ego, steer_angle, VP) |
||||
|
||||
if vp is not None: |
||||
# filter the vanishing point |
||||
self.vp_f = [self.vp_x_filter(vp[0]), self.vp_y_filter(vp[1])] |
||||
self.cal_cycle += 1 |
||||
|
||||
if not self.calibration_validity(): |
||||
self.cal_status = CalibStatus.INVALID |
||||
else: |
||||
# 10 minutes @5Hz TODO: make this threshold function of convergency speed |
||||
self.cal_status = CalibStatus.VALID |
||||
#self.cal_status = CalibStatus.VALID if self.cal_cycle > self.calibration_threshold else CalibStatus.INCOMPLETE |
||||
self.cal_perc = int(np.minimum(self.cal_cycle*100./self.calibration_threshold, 100)) |
||||
|
||||
self.update_warp_matrix() |
@ -1,121 +0,0 @@ |
||||
#!/usr/bin/env python |
||||
from __future__ import print_function |
||||
|
||||
import os |
||||
import numpy as np |
||||
import tempfile |
||||
import zmq |
||||
|
||||
from common.services import service_list |
||||
import selfdrive.messaging as messaging |
||||
from selfdrive.config import ImageParams, VehicleParams |
||||
from selfdrive.calibrationd.calibration import ViewCalibrator, CalibStatus |
||||
|
||||
CALIBRATION_TMP_DIR = "/sdcard" |
||||
CALIBRATION_FILE = "/sdcard/calibration_param" |
||||
|
||||
def load_calibration(gctx): |
||||
# calibration initialization |
||||
I = ImageParams() |
||||
vp_guess = None |
||||
|
||||
if gctx is not None: |
||||
warp_matrix_start = np.array( |
||||
gctx['calibration']["initial_homography"]).reshape(3, 3) |
||||
big_box_size = [560, 304] |
||||
else: |
||||
warp_matrix_start = np.array([[1., 0., I.SX_R], |
||||
[0., 1., I.SY_R], |
||||
[0., 0., 1.]]) |
||||
big_box_size = [640, 480] |
||||
|
||||
# translate the vanishing point into phone image space |
||||
vp_box = (I.VPX_R-I.SX_R, I.VPY_R-I.SY_R) |
||||
vp_trans = np.dot(warp_matrix_start, vp_box+(1.,)) |
||||
vp_img = (vp_trans[0]/vp_trans[2], vp_trans[1]/vp_trans[2]) |
||||
|
||||
# load calibration data |
||||
if os.path.isfile(CALIBRATION_FILE): |
||||
try: |
||||
# If the calibration file exist, start from the last cal values |
||||
with open(CALIBRATION_FILE, "r") as cal_file: |
||||
data = [float(l.strip()) for l in cal_file.readlines()] |
||||
return ViewCalibrator( |
||||
(I.X, I.Y), |
||||
big_box_size, |
||||
vp_img, |
||||
warp_matrix_start, |
||||
vp_f=[data[2], data[3]], |
||||
cal_cycle=data[0], |
||||
cal_status=data[1]) |
||||
except Exception as e: |
||||
print("Could not load calibration file: {}".format(e)) |
||||
|
||||
return ViewCalibrator( |
||||
(I.X, I.Y), big_box_size, vp_img, warp_matrix_start, vp_f=vp_guess) |
||||
|
||||
def store_calibration(calib): |
||||
# Tempfile needs to be on the same device as the calbration file. |
||||
with tempfile.NamedTemporaryFile(delete=False, dir=CALIBRATION_TMP_DIR) as cal_file: |
||||
print(calib.cal_cycle, file=cal_file) |
||||
print(calib.cal_status, file=cal_file) |
||||
print(calib.vp_f[0], file=cal_file) |
||||
print(calib.vp_f[1], file=cal_file) |
||||
cal_file_name = cal_file.name |
||||
os.rename(cal_file_name, CALIBRATION_FILE) |
||||
|
||||
def calibrationd_thread(gctx): |
||||
context = zmq.Context() |
||||
|
||||
features = messaging.sub_sock(context, service_list['features'].port) |
||||
live100 = messaging.sub_sock(context, service_list['live100'].port) |
||||
|
||||
livecalibration = messaging.pub_sock(context, service_list['liveCalibration'].port) |
||||
|
||||
# subscribe to stats about the car |
||||
VP = VehicleParams(False) |
||||
|
||||
v_ego = None |
||||
|
||||
calib = load_calibration(gctx) |
||||
last_write_cycle = calib.cal_cycle |
||||
|
||||
while 1: |
||||
# calibration at the end so it does not delay radar processing above |
||||
ft = messaging.recv_sock(features, wait=True) |
||||
|
||||
# get latest here |
||||
l100 = messaging.recv_sock(live100) |
||||
if l100 is not None: |
||||
v_ego = l100.live100.vEgo |
||||
steer_angle = l100.live100.angleSteers |
||||
|
||||
if v_ego is None: |
||||
continue |
||||
|
||||
p0 = ft.features.p0 |
||||
p1 = ft.features.p1 |
||||
st = ft.features.status |
||||
|
||||
calib.calibration(p0, p1, st, v_ego, steer_angle, VP) |
||||
|
||||
# write a new calibration every 100 cal cycle |
||||
if calib.cal_cycle - last_write_cycle >= 100: |
||||
print("writing cal", calib.cal_cycle) |
||||
store_calibration(calib) |
||||
last_write_cycle = calib.cal_cycle |
||||
|
||||
warp_matrix = map(float, calib.warp_matrix.reshape(9).tolist()) |
||||
dat = messaging.new_message() |
||||
dat.init('liveCalibration') |
||||
dat.liveCalibration.warpMatrix = warp_matrix |
||||
dat.liveCalibration.calStatus = calib.cal_status |
||||
dat.liveCalibration.calCycle = calib.cal_cycle |
||||
dat.liveCalibration.calPerc = calib.cal_perc |
||||
livecalibration.send(dat.to_bytes()) |
||||
|
||||
def main(gctx=None): |
||||
calibrationd_thread(gctx) |
||||
|
||||
if __name__ == "__main__": |
||||
main() |
@ -1,12 +0,0 @@ |
||||
fingerprints = { |
||||
"ACURA ILX 2016 ACURAWATCH PLUS": { |
||||
1024L: 5, 513L: 5, 1027L: 5, 1029L: 8, 929L: 4, 1057L: 5, 777L: 8, 1034L: 5, 1036L: 8, 398L: 3, 399L: 7, 145L: 8, 660L: 8, 985L: 3, 923L: 2, 542L: 7, 773L: 7, 800L: 8, 432L: 7, 419L: 8, 420L: 8, 1030L: 5, 422L: 8, 808L: 8, 428L: 8, 304L: 8, 819L: 7, 821L: 5, 57L: 3, 316L: 8, 545L: 4, 464L: 8, 1108L: 8, 597L: 8, 342L: 6, 983L: 8, 344L: 8, 804L: 8, 1039L: 8, 476L: 4, 892L: 8, 490L: 8, 1064L: 7, 882L: 2, 884L: 7, 887L: 8, 888L: 8, 380L: 8, 1365L: 5, |
||||
# sent messages |
||||
0xe4: 5, 0x1fa: 8, 0x200: 3, 0x30c: 8, 0x33d: 4, |
||||
}, |
||||
"HONDA CIVIC 2016 TOURING": { |
||||
1024L: 5, 513L: 5, 1027L: 5, 1029L: 8, 777L: 8, 1036L: 8, 1039L: 8, 1424L: 5, 401L: 8, 148L: 8, 662L: 4, 985L: 3, 795L: 8, 773L: 7, 800L: 8, 545L: 6, 420L: 8, 806L: 8, 808L: 8, 1322L: 5, 427L: 3, 428L: 8, 304L: 8, 432L: 7, 57L: 3, 450L: 8, 929L: 8, 330L: 8, 1302L: 8, 464L: 8, 1361L: 5, 1108L: 8, 597L: 8, 470L: 2, 344L: 8, 804L: 8, 399L: 7, 476L: 7, 1633L: 8, 487L: 4, 892L: 8, 490L: 8, 493L: 5, 884L: 8, 891L: 8, 380L: 8, 1365L: 5, |
||||
# sent messages |
||||
0xe4: 5, 0x1fa: 8, 0x200: 3, 0x30c: 8, 0x33d: 5, 0x35e: 8, 0x39f: 8, |
||||
} |
||||
} |
@ -1,17 +1,19 @@ |
||||
CEREAL_CFLAGS = -I$(PHONELIBS)/capnp-c/include
|
||||
CEREAL_CXXFLAGS = -I$(PHONELIBS)/capnp-cpp/include
|
||||
CEREAL_LIBS = -L$(PHONELIBS)/capnp-cpp/aarch64/lib/ \
|
||||
-L$(PHONELIBS)/capnp-c/aarch64/lib/ \
|
||||
-l:libcapn.a -l:libcapnp.a -l:libkj.a
|
||||
ifeq ($(CEREAL_LIBS),) |
||||
CEREAL_LIBS = -L$(PHONELIBS)/capnp-cpp/aarch64/lib/ \
|
||||
-L$(PHONELIBS)/capnp-c/aarch64/lib/ \
|
||||
-l:libcapn.a -l:libcapnp.a -l:libkj.a
|
||||
endif |
||||
CEREAL_OBJS = ../../cereal/gen/c/log.capnp.o ../../cereal/gen/c/car.capnp.o
|
||||
|
||||
log.capnp.o: ../../cereal/gen/cpp/log.capnp.c++ |
||||
@echo "[ CXX ] $@"
|
||||
$(CXX) $(CXXFLAGS) $(CEREAL_CFLAGS) \
|
||||
$(CXX) $(CXXFLAGS) $(CEREAL_CXXFLAGS) \
|
||||
-c -o '$@' '$<'
|
||||
|
||||
car.capnp.o: ../../cereal/gen/cpp/car.capnp.c++ |
||||
@echo "[ CXX ] $@"
|
||||
$(CXX) $(CXXFLAGS) $(CEREAL_CFLAGS) \
|
||||
$(CXX) $(CXXFLAGS) $(CEREAL_CXXFLAGS) \
|
||||
-c -o '$@' '$<'
|
||||
|
||||
|
@ -1,13 +0,0 @@ |
||||
#ifndef COMMON_MUTEX_H |
||||
#define COMMON_MUTEX_H |
||||
|
||||
#include <pthread.h> |
||||
|
||||
static inline void mutex_init_reentrant(pthread_mutex_t *mutex) { |
||||
pthread_mutexattr_t attr; |
||||
pthread_mutexattr_init(&attr); |
||||
pthread_mutexattr_settype(&attr, PTHREAD_MUTEX_RECURSIVE); |
||||
pthread_mutex_init(mutex, &attr); |
||||
} |
||||
|
||||
#endif |
@ -0,0 +1,124 @@ |
||||
#include "selfdrive/common/params.h" |
||||
|
||||
#include "selfdrive/common/util.h" |
||||
|
||||
#define _GNU_SOURCE |
||||
#include <sys/file.h> |
||||
#include <unistd.h> |
||||
#include <stdlib.h> |
||||
#include <stdio.h> |
||||
|
||||
int write_db_value(const char* params_path, const char* key, const char* value, |
||||
size_t value_size) { |
||||
int lock_fd = -1; |
||||
int tmp_fd = -1; |
||||
int result; |
||||
char tmp_path[1024]; |
||||
char path[1024]; |
||||
|
||||
// Write value to temp.
|
||||
result = |
||||
snprintf(tmp_path, sizeof(tmp_path), "%s/.tmp_value_XXXXXX", params_path); |
||||
if (result < 0) { |
||||
goto cleanup; |
||||
} |
||||
|
||||
tmp_fd = mkstemp(tmp_path); |
||||
const ssize_t bytes_written = write(tmp_fd, value, value_size); |
||||
if (bytes_written != value_size) { |
||||
result = -20; |
||||
goto cleanup; |
||||
} |
||||
|
||||
result = snprintf(path, sizeof(path), "%s/.lock", params_path); |
||||
if (result < 0) { |
||||
goto cleanup; |
||||
} |
||||
lock_fd = open(path, 0); |
||||
|
||||
result = snprintf(path, sizeof(path), "%s/d/%s", params_path, key); |
||||
if (result < 0) { |
||||
goto cleanup; |
||||
} |
||||
|
||||
// Take lock.
|
||||
result = flock(lock_fd, LOCK_EX); |
||||
if (result < 0) { |
||||
goto cleanup; |
||||
} |
||||
|
||||
// Move temp into place.
|
||||
result = rename(tmp_path, path); |
||||
|
||||
cleanup: |
||||
// Release lock.
|
||||
if (lock_fd >= 0) { |
||||
close(lock_fd); |
||||
} |
||||
if (tmp_fd >= 0) { |
||||
if (result < 0) { |
||||
remove(tmp_path); |
||||
} |
||||
close(tmp_fd); |
||||
} |
||||
return result; |
||||
} |
||||
|
||||
int read_db_value(const char* params_path, const char* key, char** value, |
||||
size_t* value_sz) { |
||||
int lock_fd = -1; |
||||
int result; |
||||
char path[1024]; |
||||
|
||||
result = snprintf(path, sizeof(path), "%s/.lock", params_path); |
||||
if (result < 0) { |
||||
goto cleanup; |
||||
} |
||||
lock_fd = open(path, 0); |
||||
|
||||
result = snprintf(path, sizeof(path), "%s/d/%s", params_path, key); |
||||
if (result < 0) { |
||||
goto cleanup; |
||||
} |
||||
|
||||
// Take lock.
|
||||
result = flock(lock_fd, LOCK_EX); |
||||
if (result < 0) { |
||||
goto cleanup; |
||||
} |
||||
|
||||
// Read value.
|
||||
// TODO(mgraczyk): If there is a lot of contention, we can release the lock
|
||||
// after opening the file, before reading.
|
||||
*value = read_file(path, value_sz); |
||||
if (*value == NULL) { |
||||
result = -22; |
||||
goto cleanup; |
||||
} |
||||
|
||||
// Remove one for null byte.
|
||||
if (value_sz != NULL) { |
||||
*value_sz -= 1; |
||||
} |
||||
result = 0; |
||||
|
||||
cleanup: |
||||
// Release lock.
|
||||
if (lock_fd >= 0) { |
||||
close(lock_fd); |
||||
} |
||||
return result; |
||||
} |
||||
|
||||
void read_db_value_blocking(const char* params_path, const char* key, |
||||
char** value, size_t* value_sz) { |
||||
while (1) { |
||||
const int result = read_db_value(params_path, key, value, value_sz); |
||||
if (result == 0) { |
||||
return; |
||||
} else { |
||||
// Sleep for 0.1 seconds.
|
||||
usleep(100000); |
||||
} |
||||
} |
||||
} |
@ -0,0 +1,35 @@ |
||||
#ifndef _SELFDRIVE_COMMON_PARAMS_H_ |
||||
#define _SELFDRIVE_COMMON_PARAMS_H_ |
||||
|
||||
#include <stddef.h> |
||||
|
||||
#ifdef __cplusplus |
||||
extern "C" { |
||||
#endif |
||||
|
||||
int write_db_value(const char* params_path, const char* key, const char* value, |
||||
size_t value_size); |
||||
|
||||
// Reads a value from the params database.
|
||||
// Inputs:
|
||||
// params_path: The path of the database, eg /sdcard/params.
|
||||
// key: The key to read.
|
||||
// value: A pointer where a newly allocated string containing the db value will
|
||||
// be written.
|
||||
// value_sz: A pointer where the size of value will be written. Does not
|
||||
// include the NULL terminator.
|
||||
//
|
||||
// Returns: Negative on failure, otherwise 0.
|
||||
int read_db_value(const char* params_path, const char* key, char** value, |
||||
size_t* value_sz); |
||||
|
||||
// Reads a value from the params database, blocking until successful.
|
||||
// Inputs are the same as read_db_value.
|
||||
void read_db_value_blocking(const char* params_path, const char* key, |
||||
char** value, size_t* value_sz); |
||||
|
||||
#ifdef __cplusplus |
||||
} // extern "C"
|
||||
#endif |
||||
|
||||
#endif // _SELFDRIVE_COMMON_PARAMS_H_
|
@ -0,0 +1,27 @@ |
||||
#include <stdio.h> |
||||
#include <stdlib.h> |
||||
#include <string.h> |
||||
#include <assert.h> |
||||
|
||||
void* read_file(const char* path, size_t* out_len) { |
||||
FILE* f = fopen(path, "r"); |
||||
if (!f) { |
||||
return NULL; |
||||
} |
||||
fseek(f, 0, SEEK_END); |
||||
long f_len = ftell(f); |
||||
rewind(f); |
||||
|
||||
char* buf = malloc(f_len + 1); |
||||
assert(buf); |
||||
memset(buf, 0, f_len + 1); |
||||
size_t num_read = fread(buf, f_len, 1, f); |
||||
assert(num_read == 1); |
||||
fclose(f); |
||||
|
||||
if (out_len) { |
||||
*out_len = f_len + 1; |
||||
} |
||||
|
||||
return buf; |
||||
} |
@ -0,0 +1,65 @@ |
||||
#ifndef UTILPP_H |
||||
#define UTILPP_H |
||||
|
||||
#include <cstdio> |
||||
#include <unistd.h> |
||||
|
||||
#include <string> |
||||
#include <sstream> |
||||
#include <fstream> |
||||
|
||||
namespace util { |
||||
|
||||
inline bool starts_with(std::string s, std::string prefix) { |
||||
return s.compare(0, prefix.size(), prefix) == 0; |
||||
} |
||||
|
||||
template<typename ... Args> |
||||
inline std::string string_format( const std::string& format, Args ... args ) { |
||||
size_t size = snprintf( nullptr, 0, format.c_str(), args ... ) + 1; |
||||
std::unique_ptr<char[]> buf( new char[ size ] );
|
||||
snprintf( buf.get(), size, format.c_str(), args ... ); |
||||
return std::string( buf.get(), buf.get() + size - 1 ); |
||||
} |
||||
|
||||
inline std::string read_file(std::string fn) { |
||||
std::ifstream t(fn); |
||||
std::stringstream buffer; |
||||
buffer << t.rdbuf(); |
||||
return buffer.str(); |
||||
} |
||||
|
||||
inline std::string tohex(const uint8_t* buf, size_t buf_size) { |
||||
std::unique_ptr<char[]> hexbuf(new char[buf_size*2+1]); |
||||
for (int i=0; i<buf_size; i++) { |
||||
sprintf(&hexbuf[i*2], "%02x", buf[i]); |
||||
} |
||||
hexbuf[buf_size*2] = 0; |
||||
return std::string(hexbuf.get(), hexbuf.get() + buf_size*2); |
||||
} |
||||
|
||||
inline std::string base_name(std::string const & path) { |
||||
size_t pos = path.find_last_of("/"); |
||||
if (pos == std::string::npos) return path; |
||||
return path.substr(pos + 1); |
||||
} |
||||
|
||||
inline std::string dir_name(std::string const & path) { |
||||
size_t pos = path.find_last_of("/"); |
||||
if (pos == std::string::npos) return ""; |
||||
return path.substr(0, pos); |
||||
} |
||||
|
||||
inline std::string readlink(std::string path) { |
||||
char buff[PATH_MAX]; |
||||
ssize_t len = ::readlink(path.c_str(), buff, sizeof(buff)-1); |
||||
if (len != -1) { |
||||
buff[len] = '\0'; |
||||
return std::string(buff); |
||||
} |
||||
return ""; |
||||
} |
||||
|
||||
} |
||||
|
||||
#endif |
@ -1 +1 @@ |
||||
const char *openpilot_version = "0.2.9"; |
||||
const char *openpilot_version = "0.3.0-devel"; |
||||
|
@ -0,0 +1,80 @@ |
||||
#!/usr/bin/env python |
||||
import os |
||||
import zmq |
||||
import numpy as np |
||||
import selfdrive.messaging as messaging |
||||
|
||||
from selfdrive.services import service_list |
||||
from common.realtime import sec_since_boot, set_realtime_priority |
||||
from common.params import Params |
||||
|
||||
from selfdrive.swaglog import cloudlog |
||||
from cereal import car |
||||
|
||||
from selfdrive.controls.lib.pathplanner import PathPlanner |
||||
from selfdrive.controls.lib.adaptivecruise import AdaptiveCruise |
||||
|
||||
def plannerd_thread(gctx): |
||||
context = zmq.Context() |
||||
poller = zmq.Poller() |
||||
|
||||
carstate = messaging.sub_sock(context, service_list['carState'].port, poller) |
||||
live20 = messaging.sub_sock(context, service_list['live20'].port) |
||||
model = messaging.sub_sock(context, service_list['model'].port) |
||||
|
||||
plan = messaging.pub_sock(context, service_list['plan'].port) |
||||
|
||||
# wait for stats about the car to come in from controls |
||||
cloudlog.info("plannerd is waiting for CarParams") |
||||
CP = car.CarParams.from_bytes(Params().get("CarParams", block=True)) |
||||
cloudlog.info("plannerd got CarParams") |
||||
|
||||
CS = None |
||||
PP = PathPlanner(model) |
||||
AC = AdaptiveCruise(live20) |
||||
|
||||
# start the loop |
||||
set_realtime_priority(2) |
||||
|
||||
# this runs whenever we get a packet that can change the plan |
||||
while True: |
||||
polld = poller.poll(timeout=1000) |
||||
for sock, mode in polld: |
||||
if mode != zmq.POLLIN or sock != carstate: |
||||
continue |
||||
|
||||
cur_time = sec_since_boot() |
||||
CS = messaging.recv_sock(carstate).carState |
||||
|
||||
PP.update(cur_time, CS.vEgo) |
||||
|
||||
# LoC.v_pid -> CS.vEgo |
||||
# TODO: is this change okay? |
||||
AC.update(cur_time, CS.vEgo, CS.steeringAngle, CS.vEgo, CP) |
||||
|
||||
# **** send the plan **** |
||||
plan_send = messaging.new_message() |
||||
plan_send.init('plan') |
||||
|
||||
# lateral plan |
||||
plan_send.plan.lateralValid = not PP.dead |
||||
if plan_send.plan.lateralValid: |
||||
plan_send.plan.dPoly = map(float, PP.d_poly) |
||||
|
||||
# longitudal plan |
||||
plan_send.plan.longitudinalValid = not AC.dead |
||||
if plan_send.plan.longitudinalValid: |
||||
plan_send.plan.vTarget = float(AC.v_target_lead) |
||||
plan_send.plan.aTargetMin = float(AC.a_target[0]) |
||||
plan_send.plan.aTargetMax = float(AC.a_target[1]) |
||||
plan_send.plan.jerkFactor = float(AC.jerk_factor) |
||||
|
||||
plan.send(plan_send.to_bytes()) |
||||
|
||||
|
||||
def main(gctx=None): |
||||
plannerd_thread(gctx) |
||||
|
||||
if __name__ == "__main__": |
||||
main() |
||||
|
@ -0,0 +1,36 @@ |
||||
#!/usr/bin/env python |
||||
import os |
||||
import struct |
||||
from collections import defaultdict |
||||
from common.realtime import sec_since_boot |
||||
import zmq |
||||
import selfdrive.messaging as messaging |
||||
from selfdrive.services import service_list |
||||
|
||||
|
||||
def can_printer(): |
||||
context = zmq.Context() |
||||
logcan = messaging.sub_sock(context, service_list['can'].port) |
||||
|
||||
start = sec_since_boot() |
||||
lp = sec_since_boot() |
||||
msgs = defaultdict(list) |
||||
canbus = int(os.getenv("CAN", 0)) |
||||
while 1: |
||||
can_recv = messaging.drain_sock(logcan, wait_for_one=True) |
||||
for x in can_recv: |
||||
for y in x.can: |
||||
if y.src == canbus: |
||||
msgs[y.address].append(y.dat) |
||||
|
||||
if sec_since_boot() - lp > 0.1: |
||||
dd = chr(27) + "[2J" |
||||
dd += "%5.2f\n" % (sec_since_boot() - start) |
||||
for k,v in sorted(zip(msgs.keys(), map(lambda x: x[-1].encode("hex"), msgs.values()))): |
||||
dd += "%s(%6d) %s\n" % ("%04X(%4d)" % (k,k),len(msgs[k]), v) |
||||
print dd |
||||
lp = sec_since_boot() |
||||
|
||||
if __name__ == "__main__": |
||||
can_printer() |
||||
|
@ -0,0 +1,94 @@ |
||||
#!/usr/bin/env python |
||||
from evdev import InputDevice |
||||
from select import select |
||||
import time |
||||
import numpy as np |
||||
import zmq |
||||
|
||||
from cereal import car |
||||
|
||||
import selfdrive.messaging as messaging |
||||
from selfdrive.services import service_list |
||||
from common.realtime import Ratekeeper |
||||
|
||||
from common.fingerprints import fingerprint |
||||
|
||||
if __name__ == "__main__": |
||||
# ***** connect to joystick ***** |
||||
# we use a Mad Catz V.1 |
||||
dev = InputDevice("/dev/input/event8") |
||||
print dev |
||||
|
||||
button_values = [0]*7 |
||||
axis_values = [0.0, 0.0, 0.0] |
||||
|
||||
# ***** connect to car ***** |
||||
context = zmq.Context() |
||||
logcan = messaging.sub_sock(context, service_list['can'].port) |
||||
sendcan = messaging.pub_sock(context, service_list['sendcan'].port) |
||||
|
||||
CP = fingerprint(logcan) |
||||
exec('from selfdrive.car.'+CP.carName+'.interface import CarInterface') |
||||
|
||||
CI = CarInterface(CP, logcan, sendcan) |
||||
|
||||
rk = Ratekeeper(100) |
||||
|
||||
while 1: |
||||
# **** handle joystick **** |
||||
r, w, x = select([dev], [], [], 0.0) |
||||
if dev in r: |
||||
for event in dev.read(): |
||||
# button event |
||||
if event.type == 1: |
||||
btn = event.code - 288 |
||||
if btn >= 0 and btn < 7: |
||||
button_values[btn] = int(event.value) |
||||
|
||||
# axis move event |
||||
if event.type == 3: |
||||
if event.code < 3: |
||||
if event.code == 2: |
||||
axis_values[event.code] = np.clip((255-int(event.value))/250.0, 0.0, 1.0) |
||||
else: |
||||
DEADZONE = 5 |
||||
if event.value-DEADZONE < 128 and event.value+DEADZONE > 128: |
||||
event.value = 128 |
||||
axis_values[event.code] = np.clip((int(event.value)-128)/120.0, -1.0, 1.0) |
||||
|
||||
print axis_values, button_values |
||||
# **** handle car **** |
||||
|
||||
CS = CI.update() |
||||
print CS |
||||
|
||||
CC = car.CarControl.new_message() |
||||
|
||||
CC.enabled = True |
||||
|
||||
CC.gas = float(np.clip(-axis_values[1], 0, 1.0)) |
||||
CC.brake = float(np.clip(axis_values[1], 0, 1.0)) |
||||
CC.steeringTorque = float(axis_values[0]) |
||||
|
||||
CC.hudControl.speedVisible = bool(button_values[1]) |
||||
CC.hudControl.lanesVisible = bool(button_values[2]) |
||||
CC.hudControl.leadVisible = bool(button_values[3]) |
||||
|
||||
CC.cruiseControl.override = bool(button_values[0]) |
||||
CC.cruiseControl.cancel = bool(button_values[-1]) |
||||
|
||||
CC.hudControl.setSpeed = float(axis_values[2] * 100.0) |
||||
|
||||
# TODO: test alerts |
||||
CC.hudControl.visualAlert = "none" |
||||
CC.hudControl.audibleAlert = "none" |
||||
|
||||
print CC |
||||
|
||||
if not CI.apply(CC): |
||||
print "CONTROLS FAILED" |
||||
|
||||
rk.keep_time() |
||||
|
||||
|
||||
|
@ -0,0 +1,53 @@ |
||||
#!/usr/bin/env python |
||||
import os |
||||
import zmq |
||||
|
||||
import selfdrive.messaging as messaging |
||||
from selfdrive.services import service_list |
||||
|
||||
from common.fingerprints import fingerprint |
||||
|
||||
def bpressed(CS, btype): |
||||
for b in CS.buttonEvents: |
||||
if b.type == btype: |
||||
return True |
||||
return False |
||||
|
||||
def test_loop(): |
||||
context = zmq.Context() |
||||
logcan = messaging.sub_sock(context, service_list['can'].port) |
||||
|
||||
CP = fingerprint(logcan) |
||||
exec('from selfdrive.car.'+CP.carName+'.interface import CarInterface') |
||||
|
||||
CI = CarInterface(CP, logcan, None) |
||||
|
||||
state = 0 |
||||
|
||||
states = [ |
||||
"'seatbeltNotLatched' in CS.errors", |
||||
"CS.gasPressed", |
||||
"CS.brakePressed", |
||||
"CS.steeringPressed", |
||||
"bpressed(CS, 'leftBlinker')", |
||||
"bpressed(CS, 'rightBlinker')", |
||||
"bpressed(CS, 'cancel')", |
||||
"bpressed(CS, 'accelCruise')", |
||||
"bpressed(CS, 'decelCruise')", |
||||
"bpressed(CS, 'altButton1')", |
||||
"'doorOpen' in CS.errors", |
||||
"False"] |
||||
|
||||
while 1: |
||||
# read CAN |
||||
CS = CI.update() |
||||
|
||||
while eval(states[state]) == True: |
||||
state += 1 |
||||
|
||||
print "IN STATE %d: waiting for %s" % (state, states[state]) |
||||
#print CS |
||||
|
||||
if __name__ == "__main__": |
||||
test_loop() |
||||
|
@ -0,0 +1,4 @@ |
||||
-include build_from_src.mk |
||||
|
||||
release: |
||||
@echo "loggerd: this is a release"
|
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Reference in new issue