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@ -65,8 +65,8 @@ struct i2c_random_wr_payload init_array_ar0231[] = { |
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{0x3032, 0x0000}, // SCALING_MODE
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{0x30A2, 0x0001}, // X_ODD_INC_
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{0x30A6, 0x0001}, // Y_ODD_INC_
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{0x3402, 0x0F10}, // X_OUTPUT_CONTROL
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{0x3404, 0x0970}, // Y_OUTPUT_CONTROL
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{0x3402, 0x0788}, // X_OUTPUT_CONTROL
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{0x3404, 0x04B8}, // Y_OUTPUT_CONTROL
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{0x3064, 0x1802}, // SMIA_TEST
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{0x30BA, 0x11F2}, // DIGITAL_CTRL
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@ -77,7 +77,7 @@ struct i2c_random_wr_payload init_array_ar0231[] = { |
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// Readout timing
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{0x300C, 0x07B9}, // LINE_LENGTH_PCK
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{0x300A, 0x07E7}, // FRAME_LENGTH_LINES
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{0x300A, 0x0652}, // FRAME_LENGTH_LINES
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{0x3042, 0x0000}, // EXTRA_DELAY
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// Readout Settings
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@ -107,9 +107,17 @@ struct i2c_random_wr_payload init_array_ar0231[] = { |
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// HDR Settings
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{0x3082, 0x0004}, // OPERATION_MODE_CTRL
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{0x3238, 0x0004}, // EXPOSURE_RATIO
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{0x3014, 0x098E}, // FINE_INTEGRATION_TIME_
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{0x321E, 0x098E}, // FINE_INTEGRATION_TIME2
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{0x3238, 0x0444}, // EXPOSURE_RATIO
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{0x1008, 0x0361}, // FINE_INTEGRATION_TIME_MIN
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{0x100C, 0x0589}, // FINE_INTEGRATION_TIME2_MIN
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{0x100E, 0x07B1}, // FINE_INTEGRATION_TIME3_MIN
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{0x1010, 0x0139}, // FINE_INTEGRATION_TIME4_MIN
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{0x3014, 0x08CB}, // FINE_INTEGRATION_TIME_
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{0x321E, 0x08CB}, // FINE_INTEGRATION_TIME2
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{0x321E, 0x08CB}, // FINE_INTEGRATION_TIME3
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{0x321E, 0x0894}, // FINE_INTEGRATION_TIME4
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{0x31D0, 0x0000}, // COMPANDING, no good in 10 bit?
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{0x33DA, 0x0000}, // COMPANDING
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{0x318E, 0x0200}, // PRE_HDR_GAIN_EN
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