pull/33161/head
Comma Device 9 months ago
parent 14839a172b
commit 8c0d1d3f63
  1. 2
      system/camerad/cameras/camera_common.cc
  2. 4
      system/camerad/sensors/os04c10.cc
  3. 42
      system/camerad/sensors/os04c10_registers.h

@ -84,7 +84,7 @@ void CameraBuf::init(cl_device_id device_id, cl_context context, CameraState *s,
// the encoder HW tells us the size it wants after setting it up. // the encoder HW tells us the size it wants after setting it up.
// TODO: VENUS_BUFFER_SIZE should give the size, but it's too small. dependent on encoder settings? // TODO: VENUS_BUFFER_SIZE should give the size, but it's too small. dependent on encoder settings?
size_t nv12_size = (rgb_width >= 2688 ? 2900 : 2346)*nv12_width; size_t nv12_size = (rgb_width < 1500 ? 2900 : 2346)*nv12_width;
vipc_server->create_buffers_with_sizes(stream_type, YUV_BUFFER_COUNT, false, rgb_width, rgb_height, nv12_size, nv12_width, nv12_uv_offset); vipc_server->create_buffers_with_sizes(stream_type, YUV_BUFFER_COUNT, false, rgb_width, rgb_height, nv12_size, nv12_width, nv12_uv_offset);
LOGD("created %d YUV vipc buffers with size %dx%d", YUV_BUFFER_COUNT, nv12_width, nv12_height); LOGD("created %d YUV vipc buffers with size %dx%d", YUV_BUFFER_COUNT, nv12_width, nv12_height);

@ -24,8 +24,8 @@ OS04C10::OS04C10() {
data_word = false; data_word = false;
hdr_offset = 64 * 2 + 8; // stagger hdr_offset = 64 * 2 + 8; // stagger
frame_width = 2688; frame_width = 1344;
frame_height = 1520 * 2 + hdr_offset; frame_height = 760 * 2 + hdr_offset;
frame_stride = (frame_width * 10 / 8); // no alignment frame_stride = (frame_width * 10 / 8); // no alignment
extra_height = 0; extra_height = 0;

@ -199,8 +199,8 @@ const struct i2c_random_wr_payload init_array_os04c10[] = {
{0x370b, 0xa2}, {0x370b, 0xa2},
{0x370c, 0x01}, {0x370c, 0x01},
{0x370f, 0x00}, {0x370f, 0x00},
{0x3714, 0x24}, {0x3714, 0x28},
{0x3716, 0x04}, {0x3716, 0x24},
{0x3719, 0x11}, {0x3719, 0x11},
{0x371a, 0x1e}, {0x371a, 0x1e},
{0x3720, 0x00}, {0x3720, 0x00},
@ -231,24 +231,24 @@ const struct i2c_random_wr_payload init_array_os04c10[] = {
{0x37bd, 0x01}, {0x37bd, 0x01},
{0x37bf, 0x26}, {0x37bf, 0x26},
{0x37c0, 0x11}, {0x37c0, 0x11},
{0x37c2, 0x04}, {0x37c2, 0x14},
{0x37cd, 0x19}, {0x37cd, 0x19},
// {0x37e0, 0x08}, {0x37e0, 0x08},
// {0x37e6, 0x04}, {0x37e6, 0x04},
{0x37e5, 0x02}, {0x37e5, 0x02},
// {0x37e1, 0x0c}, {0x37e1, 0x0c},
// {0x3737, 0x04}, {0x3737, 0x04},
{0x37d8, 0x02}, {0x37d8, 0x02},
// {0x37e2, 0x10}, {0x37e2, 0x10},
{0x3739, 0x10}, {0x3739, 0x10},
{0x3662, 0x10}, {0x3662, 0x08},
// {0x37e4, 0x20}, {0x37e4, 0x20},
// {0x37e3, 0x08}, {0x37e3, 0x08},
{0x37d9, 0x08}, {0x37d9, 0x04},
{0x4040, 0x00}, {0x4040, 0x00},
{0x4041, 0x07}, {0x4041, 0x03},
{0x4008, 0x02}, {0x4008, 0x01},
{0x4009, 0x0d}, {0x4009, 0x06},
// FSIN // FSIN
{0x3002, 0x22}, {0x3002, 0x22},
@ -269,20 +269,20 @@ const struct i2c_random_wr_payload init_array_os04c10[] = {
{0x3802, 0x00}, {0x3803, 0x00}, {0x3802, 0x00}, {0x3803, 0x00},
{0x3804, 0x0a}, {0x3805, 0x8f}, {0x3804, 0x0a}, {0x3805, 0x8f},
{0x3806, 0x05}, {0x3807, 0xff}, {0x3806, 0x05}, {0x3807, 0xff},
{0x3808, 0x0a}, {0x3809, 0x80}, {0x3808, 0x05}, {0x3809, 0x40},
{0x380a, 0x05}, {0x380b, 0xf0}, {0x380a, 0x02}, {0x380b, 0xf8},
{0x3811, 0x08}, {0x3811, 0x08},
{0x3813, 0x08}, {0x3813, 0x08},
{0x3814, 0x01}, {0x3814, 0x03},
{0x3815, 0x01}, {0x3815, 0x01},
{0x3816, 0x01}, {0x3816, 0x03},
{0x3817, 0x01}, {0x3817, 0x01},
{0x380c, 0x04}, {0x380d, 0x2e}, // HTS {0x380c, 0x04}, {0x380d, 0x2e}, // HTS
{0x380e, 0x09}, {0x380f, 0xdb}, // VTS {0x380e, 0x09}, {0x380f, 0xdb}, // VTS
{0x3820, 0xb0}, {0x3820, 0xb3},
{0x3821, 0x04}, {0x3821, 0x05},
{0x3880, 0x00}, {0x3880, 0x00},
{0x3882, 0x20}, {0x3882, 0x20},
{0x3c91, 0x0b}, {0x3c91, 0x0b},

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