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189 lines
10 KiB
189 lines
10 KiB
from typing import Tuple, List, NamedTuple, Any, Dict, Optional, Union, DefaultDict, cast
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from tinygrad.codegen.kernel import Ops, MemOp, UOp
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from tinygrad.ops import BinaryOps, UnaryOps
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from tinygrad.dtype import DType, dtypes
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from tinygrad.helpers import DEBUG
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from tinygrad.ops import Variable, NumNode, MulNode, DivNode, ModNode, LtNode, SumNode, AndNode
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import functools
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import math
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from collections import defaultdict
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_type_to_letter = {dtypes.float32: 'f', dtypes.bool: 'p', dtypes.int32: 'i', dtypes.int64: 'a', dtypes.uint32: 'u', dtypes.uint64: 'b', dtypes.float.vec(4): 'x', dtypes.uint8: 'uc', dtypes.float16: 'h',
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dtypes.int8: 'c', dtypes.uint16: 'us', dtypes.float64: 'd'}
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class Register(NamedTuple):
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nm:str
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dtype:DType
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scalar:bool
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off:Optional[int] = None
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def __repr__(self): return self.nm if self.off is None else f"{self.nm}:{self.off}"
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def subregs(self):
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if self.dtype == dtypes.float.vec(4):
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return [Register(self.nm, dtypes.float, False, off=off) for off in range(4)]
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return []
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class AssemblyInstruction(NamedTuple):
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op: Ops
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out: Optional[Register]
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vin: List[Union[Register, int, float]]
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arg: Any = None
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# warp size of 32, s registers are shared across the warp, v are 32-wide vectors
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class AssemblyLanguage:
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supports_load3: bool = False
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sin_is_sin2pi: bool = False
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no_div: bool = False
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#TODO: these should be global vars
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cnts:DefaultDict[Tuple[DType, bool], int] = defaultdict(int)
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tor: Dict[Any, Register] = {}
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ins: List[AssemblyInstruction] = []
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def type_to_letter(self,x): return _type_to_letter[x[0]].upper() if x[1] else _type_to_letter[x[0]]
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def newreg(self, tok, dtype=dtypes.float32, scalar=False) -> Register:
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self.tor[tok] = ret = Register(f"%{self.type_to_letter((dtype, scalar))}{self.cnts[(dtype, scalar)]}", dtype, scalar)
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if dtype == dtypes.float.vec(4):
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for off in range(4):
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self.tor[tok] = Register(ret.nm, dtypes.float, ret.scalar, off)
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self.cnts[(dtype, scalar)] += 1
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return ret
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def render_numnode(self, b) -> Register:
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key = ("num", b)
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if key not in self.tor: self.ins.append(AssemblyInstruction(Ops.LOAD, self.newreg(key, scalar=True, dtype=dtypes.int32), [], b))
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return self.tor[key]
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def render_alu(self, op, a:Register, b:Union[Register, int, float], dtype=dtypes.int32) -> Register:
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key = (op, a, b)
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if key not in self.tor:
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#if not isinstance(b, Register): b = render_numnode(b)
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self.ins.append(AssemblyInstruction(Ops.ALU, self.newreg(key, dtype=dtype, scalar=a.scalar and (not isinstance(b, Register) or b.scalar)), [a, b], op))
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return self.tor[key]
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def render_cast(self, a:Register, new_dtype:DType) -> Register:
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if a.dtype == new_dtype: return a
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key = (a, new_dtype)
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if key not in self.tor:
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self.ins.append(AssemblyInstruction(Ops.CAST, self.newreg(key, dtype=new_dtype), [a]))
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return self.tor[key]
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render_ops: Any = { Variable: lambda self, ops, ctx: ctx.tor[self], NumNode: lambda self, ops, ctx: ctx.render_numnode(self.b),
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MulNode: lambda self, ops, ctx: ctx.render_alu(BinaryOps.MUL, self.a.render(ops, ctx), self.b),
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DivNode: lambda self, ops, ctx: ctx.render_alu(BinaryOps.DIV, self.a.render(ops, ctx), self.b),
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ModNode: lambda self, ops, ctx: ctx.render_alu(BinaryOps.MOD, self.a.render(ops, ctx), self.b),
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LtNode: lambda self, ops, ctx: ctx.render_alu(BinaryOps.CMPLT, self.a.render(ops, ctx), self.b, dtype=dtypes.bool),
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SumNode: lambda self,ops,ctx: functools.reduce(lambda a,b: ctx.render_alu(BinaryOps.ADD, a, b.render(ops,ctx)), self.nodes[1:], self.nodes[0].render(ops,ctx)),
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AndNode: lambda self,ops,ctx: functools.reduce(lambda a,b: ctx.render_alu(BinaryOps.MUL, a, b.render(ops,ctx), dtype=dtypes.bool), self.nodes[1:], self.nodes[0].render(ops,ctx)) }
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def addr_w_offset(self, args):
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assert isinstance(args, MemOp)
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idx = args.idx*args.memory_dtype.itemsize
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off = 0 # TODO: should this be None?
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if isinstance(idx, SumNode):
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nums = [n.b for n in idx.nodes if isinstance(n, NumNode)]
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if nums and nums[0] < 4096 and (idx-nums[0]).min >= 0: # TODO: different for each GPU?
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idx -= nums[0]
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off = cast(int, nums[0])
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reg = idx.render(self.render_ops, self)
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if self.supports_load3:
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if reg.scalar:
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new_reg = self.newreg((reg.nm, 'vec'), dtype=reg.dtype)
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self.ins.append(AssemblyInstruction(Ops.ALU, new_reg, [reg], UnaryOps.NOOP))
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reg = new_reg
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return self.tor[args.name], reg, off
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reg = self.render_alu(BinaryOps.ADD, self.render_cast(reg, dtypes.uint64), self.tor[args.name], dtype=dtypes.uint64)
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return reg, None, off
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def uops_to_asmstyle(lang, function_name:str, uops:List[UOp]):
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#TODO: Do not use clear()
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lang.ins.clear()
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lang.tor.clear()
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lang.cnts.clear()
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buf_to_dtype = {args:dtype for uop,dtype,_,args,_ in uops if uop == Ops.DEFINE_GLOBAL}
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global_size, local_size = [], []
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skipload_branch = 0
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lang.ins += [AssemblyInstruction(Ops.SPECIAL, lang.newreg(buf, dtype=dtypes.uint64, scalar=True), [], buf) for buf in buf_to_dtype]
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for u in uops:
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uop,dtype,vin,args,_ = u
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if uop == Ops.DEFINE_LOCAL:
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lang.ins.append(AssemblyInstruction(Ops.DEFINE_LOCAL, None, [], args))
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lang.ins.append(AssemblyInstruction(Ops.ALU, lang.newreg(args[0], dtype=dtypes.uint64), [args[0]], UnaryOps.NOOP))
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elif uop == Ops.LOOP:
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if args[1] == "global":
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for i,var in enumerate(args[0]):
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global_size.append(var.max+1)
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lang.ins.append(AssemblyInstruction(Ops.SPECIAL, lang.newreg(var, dtype=dtypes.int32), [], f"gid{len(args[0])-1-i}"))
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elif args[1] == "local":
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for i,var in enumerate(args[0]):
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local_size.append(var.max+1)
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lang.ins.append(AssemblyInstruction(Ops.SPECIAL, lang.newreg(var, dtype=dtypes.int32), [], f"lid{len(args[0])-1-i}"))
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else:
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for var in args[0]:
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if not isinstance(var, NumNode): # TODO: why is this coming through?
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lang.ins.append(AssemblyInstruction(Ops.LOAD, lang.newreg(var, dtype=dtypes.int32, scalar=True), [], 0))
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lang.ins.append(AssemblyInstruction(Ops.LABEL, None, [], "$loop_"+var.expr))
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elif uop == Ops.ENDLOOP:
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if args[1] not in ["global", "local", "global+local"]:
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for var in reversed(args[0]):
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if not isinstance(var, NumNode): # TODO: why is this coming through?
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lang.ins.append(AssemblyInstruction(Ops.ALU, lang.tor[var], [lang.tor[var], 1], BinaryOps.ADD))
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pred = lang.render_alu(BinaryOps.CMPLT, lang.tor[var], var.max+1, dtypes.bool)
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lang.ins.append(AssemblyInstruction(Ops.COND_BRANCH, None, [pred], ("$loop_"+var.expr, True)))
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elif args[1] == "global+local":
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for i, var in enumerate(reversed(args[0])):
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lang.ins.append(AssemblyInstruction(Ops.ENDLOOP, None, [lang.tor[var]], (var.max+1, f"gid{i}")))
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elif args[1] == 'local':
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for i, var in enumerate(reversed(args[0])):
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lang.ins.append(AssemblyInstruction(Ops.ENDLOOP, None, [lang.tor[var]], (var.max+1, f"lid{i}")))
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elif uop == Ops.CAST:
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# TODO: we should reconsider outputting CAST in the linearizer. these are needless copies
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out = lang.newreg(u, dtype)
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for i,sr in enumerate(out.subregs()):
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lang.ins.append(AssemblyInstruction(Ops.ALU, sr, [lang.tor[vin[i]]], UnaryOps.NOOP))
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elif uop == Ops.ALU:
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out = lang.newreg(u, dtype) if u not in lang.tor else lang.tor[u]
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# this is the only thing that can violate SSA
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if args in [BinaryOps.CMPLT]:
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pred_reg = lang.newreg((u, 'pred'), dtype=dtypes.bool)
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lang.ins.append(AssemblyInstruction(Ops.ALU, pred_reg, [lang.tor[x] for x in vin], args))
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lang.ins.append(AssemblyInstruction(Ops.CAST, out, [pred_reg], args))
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elif args == BinaryOps.DIV and lang.no_div:
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tmp = lang.newreg((u, "rcp"))
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lang.ins.append(AssemblyInstruction(Ops.ALU, tmp, [lang.tor[vin[1]]], UnaryOps.RECIP))
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lang.ins.append(AssemblyInstruction(Ops.ALU, out, [lang.tor[vin[0]], tmp], BinaryOps.MUL))
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elif args == UnaryOps.SIN and lang.sin_is_sin2pi:
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tmp = lang.newreg((u, "2pi"))
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lang.ins.append(AssemblyInstruction(Ops.ALU, tmp, [lang.tor[vin[0]], 1/(math.pi*2)], BinaryOps.MUL))
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lang.ins.append(AssemblyInstruction(Ops.ALU, out, [tmp], args))
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else:
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lang.ins.append(AssemblyInstruction(Ops.ALU, out, [lang.tor[x] for x in vin], args))
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elif uop == Ops.DEFINE_ACC:
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reg = lang.newreg(u, dtype=dtype)
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lang.ins.append(AssemblyInstruction(Ops.LOAD, reg, [], args))
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elif uop == Ops.SPECIAL:
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lang.tor[u] = lang.tor[args]
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elif uop == Ops.CONST:
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lang.ins.append(AssemblyInstruction(Ops.LOAD, lang.newreg(u, dtype=dtype), [], args))
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elif uop == Ops.LOAD:
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idx, treg, off = lang.addr_w_offset(args)
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reg = lang.newreg(u, dtype=dtype, scalar=(idx.scalar and (not isinstance(treg, Register) or treg.scalar)))
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if args.valid.min == 0:
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lang.ins.append(AssemblyInstruction(Ops.LOAD, reg, [], 0))
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if args.valid.max == 1:
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pred = args.valid.render(lang.render_ops, lang)
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lang.ins.append(AssemblyInstruction(Ops.COND_BRANCH, None, [pred], (f"$skipload_{skipload_branch}", False)))
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if args.valid.max == 1:
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# NOTE: you can't compute the index in here, because it assumes it's all available later
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lang.ins.append(AssemblyInstruction(Ops.LOAD, reg, [idx] + ([treg] if treg is not None else []), (off, 'global' if not args.local else 'shared', args.memory_dtype if args.memory_dtype != dtypes.float else None)))
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if args.valid.min == 0 and args.valid.max == 1:
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lang.ins.append(AssemblyInstruction(Ops.LABEL, None, [], f"$skipload_{skipload_branch}"))
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skipload_branch += 1
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elif uop == Ops.STORE:
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if args is None:
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lang.ins.append(AssemblyInstruction(Ops.ALU, lang.tor[vin[0]], [lang.tor[vin[1]]], UnaryOps.NOOP))
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else:
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idx, treg, off = lang.addr_w_offset(args)
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lang.ins.append(AssemblyInstruction(Ops.STORE, None, [idx, lang.tor[vin[0]]] + ([treg] if treg is not None else []), (off, 'global' if not args.local else 'shared', args.memory_dtype if args.memory_dtype != dtypes.float else None)))
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if DEBUG >= 4:
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for tins in lang.ins: print(tins)
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return global_size, local_size
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