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840 lines
21 KiB
840 lines
21 KiB
#include <stdint.h>
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// Original definition in pal is in c++ and clang2py can't autogen it correctly
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// Most of this is copy pasted from mesa/src/amd/common/ac_rgp.{h, c}
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/*
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* Copyright 2020 Advanced Micro Devices, Inc.
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* Copyright 2020 Valve Corporation
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*
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* SPDX-License-Identifier: MIT
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*/
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#define SQTT_FILE_MAGIC_NUMBER 0x50303042
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#define SQTT_FILE_VERSION_MAJOR 1
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#define SQTT_FILE_VERSION_MINOR 5
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#define SQTT_GPU_NAME_MAX_SIZE 256
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#define SQTT_MAX_NUM_SE 32
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#define SQTT_SA_PER_SE 2
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#define SQTT_ACTIVE_PIXEL_PACKER_MASK_DWORDS 4
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struct sqtt_data_info {
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uint32_t cur_offset;
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uint32_t trace_status;
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union {
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uint32_t gfx9_write_counter;
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uint32_t gfx10_dropped_cntr;
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};
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};
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struct sqtt_data_se {
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struct sqtt_data_info info;
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void *data_ptr;
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uint32_t shader_engine;
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uint32_t compute_unit;
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};
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enum sqtt_version
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{
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SQTT_VERSION_NONE = 0x0,
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SQTT_VERSION_2_2 = 0x5, /* GFX8 */
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SQTT_VERSION_2_3 = 0x6, /* GFX9 */
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SQTT_VERSION_2_4 = 0x7, /* GFX10+ */
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SQTT_VERSION_3_2 = 0xb, /* GFX11+ */
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};
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enum sqtt_file_chunk_type
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{
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SQTT_FILE_CHUNK_TYPE_ASIC_INFO,
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SQTT_FILE_CHUNK_TYPE_SQTT_DESC,
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SQTT_FILE_CHUNK_TYPE_SQTT_DATA,
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SQTT_FILE_CHUNK_TYPE_API_INFO,
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SQTT_FILE_CHUNK_TYPE_RESERVED,
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SQTT_FILE_CHUNK_TYPE_QUEUE_EVENT_TIMINGS,
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SQTT_FILE_CHUNK_TYPE_CLOCK_CALIBRATION,
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SQTT_FILE_CHUNK_TYPE_CPU_INFO,
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SQTT_FILE_CHUNK_TYPE_SPM_DB,
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SQTT_FILE_CHUNK_TYPE_CODE_OBJECT_DATABASE,
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SQTT_FILE_CHUNK_TYPE_CODE_OBJECT_LOADER_EVENTS,
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SQTT_FILE_CHUNK_TYPE_PSO_CORRELATION,
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SQTT_FILE_CHUNK_TYPE_INSTRUMENTATION_TABLE,
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SQTT_FILE_CHUNK_TYPE_COUNT
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};
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struct sqtt_file_chunk_id {
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int32_t type : 8;
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int32_t index : 8;
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int32_t reserved : 16;
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};
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struct sqtt_file_chunk_header {
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struct sqtt_file_chunk_id chunk_id;
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uint16_t minor_version;
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uint16_t major_version;
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int32_t size_in_bytes;
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int32_t padding;
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};
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struct sqtt_file_header_flags {
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union {
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struct {
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uint32_t is_semaphore_queue_timing_etw : 1;
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uint32_t no_queue_semaphore_timestamps : 1;
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uint32_t reserved : 30;
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};
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uint32_t value;
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};
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};
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struct sqtt_file_header {
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uint32_t magic_number;
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uint32_t version_major;
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uint32_t version_minor;
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struct sqtt_file_header_flags flags;
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int32_t chunk_offset;
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int32_t second;
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int32_t minute;
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int32_t hour;
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int32_t day_in_month;
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int32_t month;
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int32_t year;
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int32_t day_in_week;
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int32_t day_in_year;
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int32_t is_daylight_savings;
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};
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struct sqtt_file_chunk_cpu_info {
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struct sqtt_file_chunk_header header;
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uint32_t vendor_id[4];
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uint32_t processor_brand[12];
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uint32_t reserved[2];
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uint64_t cpu_timestamp_freq;
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uint32_t clock_speed;
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uint32_t num_logical_cores;
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uint32_t num_physical_cores;
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uint32_t system_ram_size;
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};
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enum sqtt_file_chunk_asic_info_flags
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{
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SQTT_FILE_CHUNK_ASIC_INFO_FLAG_SC_PACKER_NUMBERING = (1 << 0),
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SQTT_FILE_CHUNK_ASIC_INFO_FLAG_PS1_EVENT_TOKENS_ENABLED = (1 << 1)
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};
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enum sqtt_gpu_type
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{
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SQTT_GPU_TYPE_UNKNOWN = 0x0,
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SQTT_GPU_TYPE_INTEGRATED = 0x1,
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SQTT_GPU_TYPE_DISCRETE = 0x2,
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SQTT_GPU_TYPE_VIRTUAL = 0x3
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};
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enum sqtt_gfxip_level
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{
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SQTT_GFXIP_LEVEL_NONE = 0x0,
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SQTT_GFXIP_LEVEL_GFXIP_6 = 0x1,
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SQTT_GFXIP_LEVEL_GFXIP_7 = 0x2,
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SQTT_GFXIP_LEVEL_GFXIP_8 = 0x3,
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SQTT_GFXIP_LEVEL_GFXIP_8_1 = 0x4,
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SQTT_GFXIP_LEVEL_GFXIP_9 = 0x5,
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SQTT_GFXIP_LEVEL_GFXIP_10_1 = 0x7,
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SQTT_GFXIP_LEVEL_GFXIP_10_3 = 0x9,
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SQTT_GFXIP_LEVEL_GFXIP_11_0 = 0xc,
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};
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enum sqtt_memory_type
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{
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SQTT_MEMORY_TYPE_UNKNOWN = 0x0,
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SQTT_MEMORY_TYPE_DDR = 0x1,
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SQTT_MEMORY_TYPE_DDR2 = 0x2,
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SQTT_MEMORY_TYPE_DDR3 = 0x3,
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SQTT_MEMORY_TYPE_DDR4 = 0x4,
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SQTT_MEMORY_TYPE_DDR5 = 0x5,
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SQTT_MEMORY_TYPE_GDDR3 = 0x10,
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SQTT_MEMORY_TYPE_GDDR4 = 0x11,
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SQTT_MEMORY_TYPE_GDDR5 = 0x12,
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SQTT_MEMORY_TYPE_GDDR6 = 0x13,
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SQTT_MEMORY_TYPE_HBM = 0x20,
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SQTT_MEMORY_TYPE_HBM2 = 0x21,
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SQTT_MEMORY_TYPE_HBM3 = 0x22,
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SQTT_MEMORY_TYPE_LPDDR4 = 0x30,
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SQTT_MEMORY_TYPE_LPDDR5 = 0x31,
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};
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struct sqtt_file_chunk_asic_info {
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struct sqtt_file_chunk_header header;
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uint64_t flags;
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uint64_t trace_shader_core_clock;
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uint64_t trace_memory_clock;
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int32_t device_id;
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int32_t device_revision_id;
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int32_t vgprs_per_simd;
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int32_t sgprs_per_simd;
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int32_t shader_engines;
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int32_t compute_unit_per_shader_engine;
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int32_t simd_per_compute_unit;
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int32_t wavefronts_per_simd;
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int32_t minimum_vgpr_alloc;
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int32_t vgpr_alloc_granularity;
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int32_t minimum_sgpr_alloc;
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int32_t sgpr_alloc_granularity;
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int32_t hardware_contexts;
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enum sqtt_gpu_type gpu_type;
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enum sqtt_gfxip_level gfxip_level;
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int32_t gpu_index;
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int32_t gds_size;
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int32_t gds_per_shader_engine;
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int32_t ce_ram_size;
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int32_t ce_ram_size_graphics;
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int32_t ce_ram_size_compute;
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int32_t max_number_of_dedicated_cus;
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int64_t vram_size;
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int32_t vram_bus_width;
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int32_t l2_cache_size;
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int32_t l1_cache_size;
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int32_t lds_size;
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char gpu_name[SQTT_GPU_NAME_MAX_SIZE];
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float alu_per_clock;
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float texture_per_clock;
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float prims_per_clock;
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float pixels_per_clock;
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uint64_t gpu_timestamp_frequency;
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uint64_t max_shader_core_clock;
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uint64_t max_memory_clock;
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uint32_t memory_ops_per_clock;
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enum sqtt_memory_type memory_chip_type;
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uint32_t lds_granularity;
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uint16_t cu_mask[SQTT_MAX_NUM_SE][SQTT_SA_PER_SE];
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char reserved1[128];
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uint32_t active_pixel_packer_mask[SQTT_ACTIVE_PIXEL_PACKER_MASK_DWORDS];
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char reserved2[16];
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uint32_t gl1_cache_size;
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uint32_t instruction_cache_size;
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uint32_t scalar_cache_size;
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uint32_t mall_cache_size;
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char padding[4];
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};
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enum sqtt_api_type
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{
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SQTT_API_TYPE_DIRECTX_12,
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SQTT_API_TYPE_VULKAN,
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SQTT_API_TYPE_GENERIC,
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SQTT_API_TYPE_OPENCL
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};
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enum sqtt_instruction_trace_mode
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{
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SQTT_INSTRUCTION_TRACE_DISABLED = 0x0,
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SQTT_INSTRUCTION_TRACE_FULL_FRAME = 0x1,
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SQTT_INSTRUCTION_TRACE_API_PSO = 0x2,
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};
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enum sqtt_profiling_mode
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{
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SQTT_PROFILING_MODE_PRESENT = 0x0,
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SQTT_PROFILING_MODE_USER_MARKERS = 0x1,
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SQTT_PROFILING_MODE_INDEX = 0x2,
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SQTT_PROFILING_MODE_TAG = 0x3,
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};
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union sqtt_profiling_mode_data {
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struct {
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char start[256];
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char end[256];
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} user_marker_profiling_data;
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struct {
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uint32_t start;
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uint32_t end;
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} index_profiling_data;
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struct {
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uint32_t begin_hi;
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uint32_t begin_lo;
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uint32_t end_hi;
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uint32_t end_lo;
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} tag_profiling_data;
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};
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union sqtt_instruction_trace_data {
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struct {
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uint64_t api_pso_filter;
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} api_pso_data;
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struct {
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uint32_t mask;
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} shader_engine_filter;
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};
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struct sqtt_file_chunk_api_info {
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struct sqtt_file_chunk_header header;
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enum sqtt_api_type api_type;
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uint16_t major_version;
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uint16_t minor_version;
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enum sqtt_profiling_mode profiling_mode;
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uint32_t reserved;
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union sqtt_profiling_mode_data profiling_mode_data;
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enum sqtt_instruction_trace_mode instruction_trace_mode;
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uint32_t reserved2;
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union sqtt_instruction_trace_data instruction_trace_data;
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};
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struct sqtt_code_object_database_record {
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uint32_t size;
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};
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struct sqtt_file_chunk_code_object_database {
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struct sqtt_file_chunk_header header;
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uint32_t offset;
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uint32_t flags;
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uint32_t size;
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uint32_t record_count;
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};
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struct sqtt_code_object_loader_events_record {
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uint32_t loader_event_type;
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uint32_t reserved;
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uint64_t base_address;
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uint64_t code_object_hash[2];
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uint64_t time_stamp;
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};
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struct sqtt_file_chunk_code_object_loader_events {
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struct sqtt_file_chunk_header header;
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uint32_t offset;
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uint32_t flags;
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uint32_t record_size;
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uint32_t record_count;
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};
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struct sqtt_pso_correlation_record {
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uint64_t api_pso_hash;
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uint64_t pipeline_hash[2];
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char api_level_obj_name[64];
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};
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struct sqtt_file_chunk_pso_correlation {
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struct sqtt_file_chunk_header header;
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uint32_t offset;
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uint32_t flags;
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uint32_t record_size;
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uint32_t record_count;
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};
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struct sqtt_file_chunk_sqtt_desc {
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struct sqtt_file_chunk_header header;
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int32_t shader_engine_index;
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enum sqtt_version sqtt_version;
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union {
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struct {
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int32_t instrumentation_version;
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} v0;
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struct {
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int16_t instrumentation_spec_version;
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int16_t instrumentation_api_version;
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int32_t compute_unit_index;
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} v1;
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};
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};
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struct sqtt_file_chunk_sqtt_data {
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struct sqtt_file_chunk_header header;
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int32_t offset; /* in bytes */
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int32_t size; /* in bytes */
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};
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struct sqtt_file_chunk_queue_event_timings {
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struct sqtt_file_chunk_header header;
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uint32_t queue_info_table_record_count;
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uint32_t queue_info_table_size;
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uint32_t queue_event_table_record_count;
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uint32_t queue_event_table_size;
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};
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enum sqtt_queue_type {
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SQTT_QUEUE_TYPE_UNKNOWN = 0x0,
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SQTT_QUEUE_TYPE_UNIVERSAL = 0x1,
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SQTT_QUEUE_TYPE_COMPUTE = 0x2,
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SQTT_QUEUE_TYPE_DMA = 0x3,
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};
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enum sqtt_engine_type {
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SQTT_ENGINE_TYPE_UNKNOWN = 0x0,
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SQTT_ENGINE_TYPE_UNIVERSAL = 0x1,
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SQTT_ENGINE_TYPE_COMPUTE = 0x2,
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SQTT_ENGINE_TYPE_EXCLUSIVE_COMPUTE = 0x3,
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SQTT_ENGINE_TYPE_DMA = 0x4,
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SQTT_ENGINE_TYPE_HIGH_PRIORITY_UNIVERSAL = 0x7,
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SQTT_ENGINE_TYPE_HIGH_PRIORITY_GRAPHICS = 0x8,
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};
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struct sqtt_queue_hardware_info {
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union {
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struct {
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int32_t queue_type : 8;
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int32_t engine_type : 8;
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uint32_t reserved : 16;
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};
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uint32_t value;
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};
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};
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struct sqtt_queue_info_record {
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uint64_t queue_id;
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uint64_t queue_context;
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struct sqtt_queue_hardware_info hardware_info;
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uint32_t reserved;
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};
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enum sqtt_queue_event_type {
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SQTT_QUEUE_TIMING_EVENT_CMDBUF_SUBMIT,
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SQTT_QUEUE_TIMING_EVENT_SIGNAL_SEMAPHORE,
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SQTT_QUEUE_TIMING_EVENT_WAIT_SEMAPHORE,
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SQTT_QUEUE_TIMING_EVENT_PRESENT
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};
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struct sqtt_queue_event_record {
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enum sqtt_queue_event_type event_type;
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uint32_t sqtt_cb_id;
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uint64_t frame_index;
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uint32_t queue_info_index;
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uint32_t submit_sub_index;
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uint64_t api_id;
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uint64_t cpu_timestamp;
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uint64_t gpu_timestamps[2];
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};
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struct sqtt_file_chunk_clock_calibration {
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struct sqtt_file_chunk_header header;
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uint64_t cpu_timestamp;
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uint64_t gpu_timestamp;
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uint64_t reserved;
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};
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enum elf_gfxip_level
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{
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EF_AMDGPU_MACH_AMDGCN_GFX801 = 0x028,
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EF_AMDGPU_MACH_AMDGCN_GFX900 = 0x02c,
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EF_AMDGPU_MACH_AMDGCN_GFX1010 = 0x033,
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EF_AMDGPU_MACH_AMDGCN_GFX1030 = 0x036,
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EF_AMDGPU_MACH_AMDGCN_GFX1100 = 0x041,
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};
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struct sqtt_file_chunk_spm_db {
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struct sqtt_file_chunk_header header;
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uint32_t flags;
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uint32_t preamble_size;
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uint32_t num_timestamps;
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uint32_t num_spm_counter_info;
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uint32_t spm_counter_info_size;
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uint32_t sample_interval;
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};
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/**
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* Identifiers for RGP SQ thread-tracing markers (Table 1)
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*/
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enum rgp_sqtt_marker_identifier
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{
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RGP_SQTT_MARKER_IDENTIFIER_EVENT = 0x0,
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RGP_SQTT_MARKER_IDENTIFIER_CB_START = 0x1,
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RGP_SQTT_MARKER_IDENTIFIER_CB_END = 0x2,
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RGP_SQTT_MARKER_IDENTIFIER_BARRIER_START = 0x3,
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RGP_SQTT_MARKER_IDENTIFIER_BARRIER_END = 0x4,
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RGP_SQTT_MARKER_IDENTIFIER_USER_EVENT = 0x5,
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RGP_SQTT_MARKER_IDENTIFIER_GENERAL_API = 0x6,
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RGP_SQTT_MARKER_IDENTIFIER_SYNC = 0x7,
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RGP_SQTT_MARKER_IDENTIFIER_PRESENT = 0x8,
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RGP_SQTT_MARKER_IDENTIFIER_LAYOUT_TRANSITION = 0x9,
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RGP_SQTT_MARKER_IDENTIFIER_RENDER_PASS = 0xA,
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RGP_SQTT_MARKER_IDENTIFIER_RESERVED2 = 0xB,
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RGP_SQTT_MARKER_IDENTIFIER_BIND_PIPELINE = 0xC,
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RGP_SQTT_MARKER_IDENTIFIER_RESERVED4 = 0xD,
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RGP_SQTT_MARKER_IDENTIFIER_RESERVED5 = 0xE,
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RGP_SQTT_MARKER_IDENTIFIER_RESERVED6 = 0xF
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};
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/**
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* Command buffer IDs used in RGP SQ thread-tracing markers (only 20 bits).
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*/
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union rgp_sqtt_marker_cb_id {
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struct {
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uint32_t per_frame : 1; /* Must be 1, frame-based command buffer ID. */
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uint32_t frame_index : 7;
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uint32_t cb_index : 12; /* Command buffer index within the frame. */
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uint32_t reserved : 12;
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} per_frame_cb_id;
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struct {
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uint32_t per_frame : 1; /* Must be 0, global command buffer ID. */
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uint32_t cb_index : 19; /* Global command buffer index. */
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uint32_t reserved : 12;
|
|
} global_cb_id;
|
|
|
|
uint32_t all;
|
|
};
|
|
|
|
/**
|
|
* RGP SQ thread-tracing marker for the start of a command buffer. (Table 2)
|
|
*/
|
|
struct rgp_sqtt_marker_cb_start {
|
|
union {
|
|
struct {
|
|
uint32_t identifier : 4;
|
|
uint32_t ext_dwords : 3;
|
|
uint32_t cb_id : 20;
|
|
uint32_t queue : 5;
|
|
};
|
|
uint32_t dword01;
|
|
};
|
|
union {
|
|
uint32_t device_id_low;
|
|
uint32_t dword02;
|
|
};
|
|
union {
|
|
uint32_t device_id_high;
|
|
uint32_t dword03;
|
|
};
|
|
union {
|
|
uint32_t queue_flags;
|
|
uint32_t dword04;
|
|
};
|
|
};
|
|
|
|
/**
|
|
*
|
|
* RGP SQ thread-tracing marker for the end of a command buffer. (Table 3)
|
|
*/
|
|
struct rgp_sqtt_marker_cb_end {
|
|
union {
|
|
struct {
|
|
uint32_t identifier : 4;
|
|
uint32_t ext_dwords : 3;
|
|
uint32_t cb_id : 20;
|
|
uint32_t reserved : 5;
|
|
};
|
|
uint32_t dword01;
|
|
};
|
|
union {
|
|
uint32_t device_id_low;
|
|
uint32_t dword02;
|
|
};
|
|
union {
|
|
uint32_t device_id_high;
|
|
uint32_t dword03;
|
|
};
|
|
};
|
|
|
|
/**
|
|
* API types used in RGP SQ thread-tracing markers for the "General API"
|
|
* packet.
|
|
*/
|
|
enum rgp_sqtt_marker_general_api_type
|
|
{
|
|
ApiCmdBindPipeline = 0,
|
|
ApiCmdBindDescriptorSets = 1,
|
|
ApiCmdBindIndexBuffer = 2,
|
|
ApiCmdBindVertexBuffers = 3,
|
|
ApiCmdDraw = 4,
|
|
ApiCmdDrawIndexed = 5,
|
|
ApiCmdDrawIndirect = 6,
|
|
ApiCmdDrawIndexedIndirect = 7,
|
|
ApiCmdDrawIndirectCountAMD = 8,
|
|
ApiCmdDrawIndexedIndirectCountAMD = 9,
|
|
ApiCmdDispatch = 10,
|
|
ApiCmdDispatchIndirect = 11,
|
|
ApiCmdCopyBuffer = 12,
|
|
ApiCmdCopyImage = 13,
|
|
ApiCmdBlitImage = 14,
|
|
ApiCmdCopyBufferToImage = 15,
|
|
ApiCmdCopyImageToBuffer = 16,
|
|
ApiCmdUpdateBuffer = 17,
|
|
ApiCmdFillBuffer = 18,
|
|
ApiCmdClearColorImage = 19,
|
|
ApiCmdClearDepthStencilImage = 20,
|
|
ApiCmdClearAttachments = 21,
|
|
ApiCmdResolveImage = 22,
|
|
ApiCmdWaitEvents = 23,
|
|
ApiCmdPipelineBarrier = 24,
|
|
ApiCmdBeginQuery = 25,
|
|
ApiCmdEndQuery = 26,
|
|
ApiCmdResetQueryPool = 27,
|
|
ApiCmdWriteTimestamp = 28,
|
|
ApiCmdCopyQueryPoolResults = 29,
|
|
ApiCmdPushConstants = 30,
|
|
ApiCmdBeginRenderPass = 31,
|
|
ApiCmdNextSubpass = 32,
|
|
ApiCmdEndRenderPass = 33,
|
|
ApiCmdExecuteCommands = 34,
|
|
ApiCmdSetViewport = 35,
|
|
ApiCmdSetScissor = 36,
|
|
ApiCmdSetLineWidth = 37,
|
|
ApiCmdSetDepthBias = 38,
|
|
ApiCmdSetBlendConstants = 39,
|
|
ApiCmdSetDepthBounds = 40,
|
|
ApiCmdSetStencilCompareMask = 41,
|
|
ApiCmdSetStencilWriteMask = 42,
|
|
ApiCmdSetStencilReference = 43,
|
|
ApiCmdDrawIndirectCount = 44,
|
|
ApiCmdDrawIndexedIndirectCount = 45,
|
|
/* gap */
|
|
ApiCmdDrawMeshTasksEXT = 47,
|
|
ApiCmdDrawMeshTasksIndirectCountEXT = 48,
|
|
ApiCmdDrawMeshTasksIndirectEXT = 49,
|
|
|
|
ApiRayTracingSeparateCompiled = 0x800000,
|
|
ApiInvalid = 0xffffffff
|
|
};
|
|
|
|
/**
|
|
* RGP SQ thread-tracing marker for a "General API" instrumentation packet.
|
|
*/
|
|
struct rgp_sqtt_marker_general_api {
|
|
union {
|
|
struct {
|
|
uint32_t identifier : 4;
|
|
uint32_t ext_dwords : 3;
|
|
uint32_t api_type : 20;
|
|
uint32_t is_end : 1;
|
|
uint32_t reserved : 4;
|
|
};
|
|
uint32_t dword01;
|
|
};
|
|
};
|
|
|
|
/**
|
|
* API types used in RGP SQ thread-tracing markers (Table 16).
|
|
*/
|
|
enum rgp_sqtt_marker_event_type
|
|
{
|
|
EventCmdDraw = 0,
|
|
EventCmdDrawIndexed = 1,
|
|
EventCmdDrawIndirect = 2,
|
|
EventCmdDrawIndexedIndirect = 3,
|
|
EventCmdDrawIndirectCountAMD = 4,
|
|
EventCmdDrawIndexedIndirectCountAMD = 5,
|
|
EventCmdDispatch = 6,
|
|
EventCmdDispatchIndirect = 7,
|
|
EventCmdCopyBuffer = 8,
|
|
EventCmdCopyImage = 9,
|
|
EventCmdBlitImage = 10,
|
|
EventCmdCopyBufferToImage = 11,
|
|
EventCmdCopyImageToBuffer = 12,
|
|
EventCmdUpdateBuffer = 13,
|
|
EventCmdFillBuffer = 14,
|
|
EventCmdClearColorImage = 15,
|
|
EventCmdClearDepthStencilImage = 16,
|
|
EventCmdClearAttachments = 17,
|
|
EventCmdResolveImage = 18,
|
|
EventCmdWaitEvents = 19,
|
|
EventCmdPipelineBarrier = 20,
|
|
EventCmdResetQueryPool = 21,
|
|
EventCmdCopyQueryPoolResults = 22,
|
|
EventRenderPassColorClear = 23,
|
|
EventRenderPassDepthStencilClear = 24,
|
|
EventRenderPassResolve = 25,
|
|
EventInternalUnknown = 26,
|
|
EventCmdDrawIndirectCount = 27,
|
|
EventCmdDrawIndexedIndirectCount = 28,
|
|
/* gap */
|
|
EventCmdTraceRaysKHR = 30,
|
|
EventCmdTraceRaysIndirectKHR = 31,
|
|
EventCmdBuildAccelerationStructuresKHR = 32,
|
|
EventCmdBuildAccelerationStructuresIndirectKHR = 33,
|
|
EventCmdCopyAccelerationStructureKHR = 34,
|
|
EventCmdCopyAccelerationStructureToMemoryKHR = 35,
|
|
EventCmdCopyMemoryToAccelerationStructureKHR = 36,
|
|
/* gap */
|
|
EventCmdDrawMeshTasksEXT = 41,
|
|
EventCmdDrawMeshTasksIndirectCountEXT = 42,
|
|
EventCmdDrawMeshTasksIndirectEXT = 43,
|
|
EventUnknown = 0x7fff,
|
|
EventInvalid = 0xffffffff
|
|
};
|
|
|
|
/**
|
|
* "Event (Per-draw/dispatch)" RGP SQ thread-tracing marker. (Table 4)
|
|
*/
|
|
struct rgp_sqtt_marker_event {
|
|
union {
|
|
struct {
|
|
uint32_t identifier : 4;
|
|
uint32_t ext_dwords : 3;
|
|
uint32_t api_type : 24;
|
|
uint32_t has_thread_dims : 1;
|
|
};
|
|
uint32_t dword01;
|
|
};
|
|
union {
|
|
struct {
|
|
uint32_t cb_id : 20;
|
|
uint32_t vertex_offset_reg_idx : 4;
|
|
uint32_t instance_offset_reg_idx : 4;
|
|
uint32_t draw_index_reg_idx : 4;
|
|
};
|
|
uint32_t dword02;
|
|
};
|
|
union {
|
|
uint32_t cmd_id;
|
|
uint32_t dword03;
|
|
};
|
|
};
|
|
|
|
/**
|
|
* Per-dispatch specific marker where workgroup dims are included.
|
|
*/
|
|
struct rgp_sqtt_marker_event_with_dims {
|
|
struct rgp_sqtt_marker_event event;
|
|
uint32_t thread_x;
|
|
uint32_t thread_y;
|
|
uint32_t thread_z;
|
|
};
|
|
|
|
/**
|
|
* "Barrier Start" RGP SQTT instrumentation marker (Table 5)
|
|
*/
|
|
struct rgp_sqtt_marker_barrier_start {
|
|
union {
|
|
struct {
|
|
uint32_t identifier : 4;
|
|
uint32_t ext_dwords : 3;
|
|
uint32_t cb_id : 20;
|
|
uint32_t reserved : 5;
|
|
};
|
|
uint32_t dword01;
|
|
};
|
|
union {
|
|
struct {
|
|
uint32_t driver_reason : 31;
|
|
uint32_t internal : 1;
|
|
};
|
|
uint32_t dword02;
|
|
};
|
|
};
|
|
|
|
/**
|
|
* "Barrier End" RGP SQTT instrumentation marker (Table 6)
|
|
*/
|
|
struct rgp_sqtt_marker_barrier_end {
|
|
union {
|
|
struct {
|
|
uint32_t identifier : 4;
|
|
uint32_t ext_dwords : 3;
|
|
uint32_t cb_id : 20;
|
|
uint32_t wait_on_eop_ts : 1;
|
|
uint32_t vs_partial_flush : 1;
|
|
uint32_t ps_partial_flush : 1;
|
|
uint32_t cs_partial_flush : 1;
|
|
uint32_t pfp_sync_me : 1;
|
|
};
|
|
uint32_t dword01;
|
|
};
|
|
union {
|
|
struct {
|
|
uint32_t sync_cp_dma : 1;
|
|
uint32_t inval_tcp : 1;
|
|
uint32_t inval_sqI : 1;
|
|
uint32_t inval_sqK : 1;
|
|
uint32_t flush_tcc : 1;
|
|
uint32_t inval_tcc : 1;
|
|
uint32_t flush_cb : 1;
|
|
uint32_t inval_cb : 1;
|
|
uint32_t flush_db : 1;
|
|
uint32_t inval_db : 1;
|
|
uint32_t num_layout_transitions : 16;
|
|
uint32_t inval_gl1 : 1;
|
|
uint32_t wait_on_ts : 1;
|
|
uint32_t eop_ts_bottom_of_pipe : 1;
|
|
uint32_t eos_ts_ps_done : 1;
|
|
uint32_t eos_ts_cs_done : 1;
|
|
uint32_t reserved : 1;
|
|
};
|
|
uint32_t dword02;
|
|
};
|
|
};
|
|
|
|
/**
|
|
* "Layout Transition" RGP SQTT instrumentation marker (Table 7)
|
|
*/
|
|
struct rgp_sqtt_marker_layout_transition {
|
|
union {
|
|
struct {
|
|
uint32_t identifier : 4;
|
|
uint32_t ext_dwords : 3;
|
|
uint32_t depth_stencil_expand : 1;
|
|
uint32_t htile_hiz_range_expand : 1;
|
|
uint32_t depth_stencil_resummarize : 1;
|
|
uint32_t dcc_decompress : 1;
|
|
uint32_t fmask_decompress : 1;
|
|
uint32_t fast_clear_eliminate : 1;
|
|
uint32_t fmask_color_expand : 1;
|
|
uint32_t init_mask_ram : 1;
|
|
uint32_t reserved1 : 17;
|
|
};
|
|
uint32_t dword01;
|
|
};
|
|
union {
|
|
struct {
|
|
uint32_t reserved2 : 32;
|
|
};
|
|
uint32_t dword02;
|
|
};
|
|
};
|
|
|
|
/**
|
|
* "User Event" RGP SQTT instrumentation marker (Table 8)
|
|
*/
|
|
struct rgp_sqtt_marker_user_event {
|
|
union {
|
|
struct {
|
|
uint32_t identifier : 4;
|
|
uint32_t reserved0 : 8;
|
|
uint32_t data_type : 8;
|
|
uint32_t reserved1 : 12;
|
|
};
|
|
uint32_t dword01;
|
|
};
|
|
};
|
|
struct rgp_sqtt_marker_user_event_with_length {
|
|
struct rgp_sqtt_marker_user_event user_event;
|
|
uint32_t length;
|
|
};
|
|
|
|
enum rgp_sqtt_marker_user_event_type
|
|
{
|
|
UserEventTrigger = 0,
|
|
UserEventPop,
|
|
UserEventPush,
|
|
UserEventObjectName,
|
|
};
|
|
|
|
/**
|
|
* "Pipeline bind" RGP SQTT instrumentation marker (Table 12)
|
|
*/
|
|
struct rgp_sqtt_marker_pipeline_bind {
|
|
union {
|
|
struct {
|
|
uint32_t identifier : 4;
|
|
uint32_t ext_dwords : 3;
|
|
uint32_t bind_point : 1;
|
|
uint32_t cb_id : 20;
|
|
uint32_t reserved : 4;
|
|
};
|
|
uint32_t dword01;
|
|
};
|
|
union {
|
|
uint32_t api_pso_hash[2];
|
|
struct {
|
|
uint32_t dword02;
|
|
uint32_t dword03;
|
|
};
|
|
};
|
|
};
|
|
|