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							304 lines
						
					
					
						
							7.5 KiB
						
					
					
				
			
		
		
	
	
							304 lines
						
					
					
						
							7.5 KiB
						
					
					
				// IRQs: USART1, USART2, USART3, UART5
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// ***************************** serial port queues *****************************
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// esp = USART1
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uart_ring esp_ring = { .w_ptr_tx = 0, .r_ptr_tx = 0,
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                       .w_ptr_rx = 0, .r_ptr_rx = 0,
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                       .uart = USART1,
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                       .callback = NULL};
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// lin1, K-LINE = UART5
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// lin2, L-LINE = USART3
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uart_ring lin1_ring = { .w_ptr_tx = 0, .r_ptr_tx = 0,
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                        .w_ptr_rx = 0, .r_ptr_rx = 0,
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                        .uart = UART5,
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                        .callback = NULL};
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uart_ring lin2_ring = { .w_ptr_tx = 0, .r_ptr_tx = 0,
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                        .w_ptr_rx = 0, .r_ptr_rx = 0,
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                        .uart = USART3,
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                        .callback = NULL};
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// debug = USART2
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void debug_ring_callback(uart_ring *ring);
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uart_ring debug_ring = { .w_ptr_tx = 0, .r_ptr_tx = 0,
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                         .w_ptr_rx = 0, .r_ptr_rx = 0,
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                         .uart = USART2,
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                         .callback = debug_ring_callback};
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uart_ring *get_ring_by_number(int a) {
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  switch(a) {
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    case 0:
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      return &debug_ring;
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    case 1:
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      return &esp_ring;
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    case 2:
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      return &lin1_ring;
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    case 3:
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      return &lin2_ring;
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    default:
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      return NULL;
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  }
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}
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// ***************************** serial port *****************************
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void uart_ring_process(uart_ring *q) {
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  enter_critical_section();
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  // TODO: check if external serial is connected
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  int sr = q->uart->SR;
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  if (q->w_ptr_tx != q->r_ptr_tx) {
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    if (sr & USART_SR_TXE) {
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      q->uart->DR = q->elems_tx[q->r_ptr_tx];
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      q->r_ptr_tx = (q->r_ptr_tx + 1) % FIFO_SIZE;
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    } else {
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      // push on interrupt later
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      q->uart->CR1 |= USART_CR1_TXEIE;
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    }
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  } else {
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    // nothing to send
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    q->uart->CR1 &= ~USART_CR1_TXEIE;
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  }
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  if (sr & USART_SR_RXNE || sr & USART_SR_ORE) {
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    uint8_t c = q->uart->DR;  // TODO: can drop packets
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    if (q != &esp_ring) {
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      uint16_t next_w_ptr = (q->w_ptr_rx + 1) % FIFO_SIZE;
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      if (next_w_ptr != q->r_ptr_rx) {
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        q->elems_rx[q->w_ptr_rx] = c;
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        q->w_ptr_rx = next_w_ptr;
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        if (q->callback) q->callback(q);
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      }
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    }
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  }
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  if (sr & USART_SR_ORE) {
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    // set dropped packet flag?
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  }
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  exit_critical_section();
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}
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// interrupt boilerplate
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void USART1_IRQHandler(void) { uart_ring_process(&esp_ring); }
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void USART2_IRQHandler(void) { uart_ring_process(&debug_ring); }
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void USART3_IRQHandler(void) { uart_ring_process(&lin2_ring); }
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void UART5_IRQHandler(void) { uart_ring_process(&lin1_ring); }
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int getc(uart_ring *q, char *elem) {
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  int ret = 0;
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  enter_critical_section();
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  if (q->w_ptr_rx != q->r_ptr_rx) {
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    *elem = q->elems_rx[q->r_ptr_rx];
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    q->r_ptr_rx = (q->r_ptr_rx + 1) % FIFO_SIZE;
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    ret = 1;
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  }
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  exit_critical_section();
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  return ret;
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}
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int injectc(uart_ring *q, char elem) {
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  int ret = 0;
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  uint16_t next_w_ptr;
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  enter_critical_section();
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  next_w_ptr = (q->w_ptr_rx + 1) % FIFO_SIZE;
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  if (next_w_ptr != q->r_ptr_rx) {
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    q->elems_rx[q->w_ptr_rx] = elem;
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    q->w_ptr_rx = next_w_ptr;
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    ret = 1;
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  }
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  exit_critical_section();
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  return ret;
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}
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int putc(uart_ring *q, char elem) {
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  int ret = 0;
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  uint16_t next_w_ptr;
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  enter_critical_section();
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  next_w_ptr = (q->w_ptr_tx + 1) % FIFO_SIZE;
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  if (next_w_ptr != q->r_ptr_tx) {
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    q->elems_tx[q->w_ptr_tx] = elem;
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    q->w_ptr_tx = next_w_ptr;
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    ret = 1;
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  }
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  exit_critical_section();
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  uart_ring_process(q);
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  return ret;
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}
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void clear_uart_buff(uart_ring *q) {
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  enter_critical_section();
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  q->w_ptr_tx = 0;
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  q->r_ptr_tx = 0;
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  q->w_ptr_rx = 0;
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  q->r_ptr_rx = 0;
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  exit_critical_section();
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}
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// ***************************** start UART code *****************************
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#define __DIV(_PCLK_, _BAUD_)                        (((_PCLK_)*25)/(4*(_BAUD_)))
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#define __DIVMANT(_PCLK_, _BAUD_)                    (__DIV((_PCLK_), (_BAUD_))/100)
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#define __DIVFRAQ(_PCLK_, _BAUD_)                    (((__DIV((_PCLK_), (_BAUD_)) - (__DIVMANT((_PCLK_), (_BAUD_)) * 100)) * 16 + 50) / 100)
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#define __USART_BRR(_PCLK_, _BAUD_)              ((__DIVMANT((_PCLK_), (_BAUD_)) << 4)|(__DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0F))
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void uart_set_baud(USART_TypeDef *u, int baud) {
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  if (u == USART1) {
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    // USART1 is on APB2
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    u->BRR = __USART_BRR(48000000, baud);
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  } else {
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    u->BRR = __USART_BRR(24000000, baud);
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  }
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}
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#define USART1_DMA_LEN 0x20
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char usart1_dma[USART1_DMA_LEN];
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void uart_dma_drain() {
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  uart_ring *q = &esp_ring;
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  enter_critical_section();
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  if (DMA2->HISR & DMA_HISR_TCIF5 || DMA2->HISR & DMA_HISR_HTIF5 || DMA2_Stream5->NDTR != USART1_DMA_LEN) {
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    // disable DMA
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    q->uart->CR3 &= ~USART_CR3_DMAR;
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    DMA2_Stream5->CR &= ~DMA_SxCR_EN;
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    while (DMA2_Stream5->CR & DMA_SxCR_EN);
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    int i;
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    for (i = 0; i < USART1_DMA_LEN - DMA2_Stream5->NDTR; i++) {
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      char c = usart1_dma[i];
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      uint16_t next_w_ptr = (q->w_ptr_rx + 1) % FIFO_SIZE;
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      if (next_w_ptr != q->r_ptr_rx) {
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        q->elems_rx[q->w_ptr_rx] = c;
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        q->w_ptr_rx = next_w_ptr;
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      }
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    }
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    // reset DMA len
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    DMA2_Stream5->NDTR = USART1_DMA_LEN;
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    // clear interrupts
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    DMA2->HIFCR = DMA_HIFCR_CTCIF5 | DMA_HIFCR_CHTIF5;
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    //DMA2->HIFCR = DMA_HIFCR_CTEIF5 | DMA_HIFCR_CDMEIF5 | DMA_HIFCR_CFEIF5;
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    // enable DMA
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    DMA2_Stream5->CR |= DMA_SxCR_EN;
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    q->uart->CR3 |= USART_CR3_DMAR;
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  }
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  exit_critical_section();
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}
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void DMA2_Stream5_IRQHandler(void) {
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  //set_led(LED_BLUE, 1);
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  uart_dma_drain();
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  //set_led(LED_BLUE, 0);
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}
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void uart_init(USART_TypeDef *u, int baud) {
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  // enable uart and tx+rx mode
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  u->CR1 = USART_CR1_UE;
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  uart_set_baud(u, baud);
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  u->CR1 |= USART_CR1_TE | USART_CR1_RE;
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  //u->CR2 = USART_CR2_STOP_0 | USART_CR2_STOP_1;
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  //u->CR2 = USART_CR2_STOP_0;
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  // ** UART is ready to work **
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  // enable interrupts
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  if (u != USART1) {
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    u->CR1 |= USART_CR1_RXNEIE;
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  }
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  if (u == USART1) {
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    // DMA2, stream 2, channel 3
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    DMA2_Stream5->M0AR = (uint32_t)usart1_dma;
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    DMA2_Stream5->NDTR = USART1_DMA_LEN;
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    DMA2_Stream5->PAR = (uint32_t)&(USART1->DR);
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    // channel4, increment memory, periph -> memory, enable
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    DMA2_Stream5->CR = DMA_SxCR_CHSEL_2 | DMA_SxCR_MINC | DMA_SxCR_HTIE | DMA_SxCR_TCIE | DMA_SxCR_EN;
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    // this one uses DMA receiver
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    u->CR3 = USART_CR3_DMAR;
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    NVIC_EnableIRQ(DMA2_Stream5_IRQn);
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    NVIC_EnableIRQ(USART1_IRQn);
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  } else if (u == USART2) {
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    NVIC_EnableIRQ(USART2_IRQn);
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  } else if (u == USART3) {
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    NVIC_EnableIRQ(USART3_IRQn);
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  } else if (u == UART5) {
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    NVIC_EnableIRQ(UART5_IRQn);
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  }
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}
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void putch(const char a) {
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  if (has_external_debug_serial) {
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    /*while ((debug_ring.uart->SR & USART_SR_TXE) == 0);
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    debug_ring.uart->DR = a;*/
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    // assuming debugging is important if there's external serial connected
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    while (!putc(&debug_ring, a));
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    //putc(&debug_ring, a);
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  } else {
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    injectc(&debug_ring, a);
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  }
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}
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int puts(const char *a) {
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  for (;*a;a++) {
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    if (*a == '\n') putch('\r');
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    putch(*a);
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  }
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  return 0;
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}
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void putui(uint32_t i) {
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  char str[11];
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  uint8_t idx = 10;
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  str[idx--] = '\0';
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  do {
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    str[idx--] = (i % 10) + 0x30;
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    i /= 10;
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  } while (i);
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  puts(str + idx + 1);
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}
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void puth(unsigned int i) {
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  int pos;
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  char c[] = "0123456789abcdef";
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  for (pos = 28; pos != -4; pos -= 4) {
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    putch(c[(i >> pos) & 0xF]);
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  }
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}
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void puth2(unsigned int i) {
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  int pos;
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  char c[] = "0123456789abcdef";
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  for (pos = 4; pos != -4; pos -= 4) {
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    putch(c[(i >> pos) & 0xF]);
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  }
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}
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void hexdump(const void *a, int l) {
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  int i;
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  for (i=0;i<l;i++) {
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    if (i != 0 && (i&0xf) == 0) puts("\n");
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    puth2(((const unsigned char*)a)[i]);
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    puts(" ");
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  }
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  puts("\n");
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}
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