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222 lines
8.3 KiB
222 lines
8.3 KiB
#include "bxcan_declarations.h"
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// IRQs: CAN1_TX, CAN1_RX0, CAN1_SCE
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// CAN2_TX, CAN2_RX0, CAN2_SCE
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// CAN3_TX, CAN3_RX0, CAN3_SCE
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CAN_TypeDef *cans[CAN_ARRAY_SIZE] = {CAN1, CAN2, CAN3};
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uint8_t can_irq_number[CAN_IRQS_ARRAY_SIZE][CAN_IRQS_ARRAY_SIZE] = {
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{ CAN1_TX_IRQn, CAN1_RX0_IRQn, CAN1_SCE_IRQn },
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{ CAN2_TX_IRQn, CAN2_RX0_IRQn, CAN2_SCE_IRQn },
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{ CAN3_TX_IRQn, CAN3_RX0_IRQn, CAN3_SCE_IRQn },
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};
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bool can_set_speed(uint8_t can_number) {
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bool ret = true;
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CAN_TypeDef *CANx = CANIF_FROM_CAN_NUM(can_number);
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uint8_t bus_number = BUS_NUM_FROM_CAN_NUM(can_number);
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ret &= llcan_set_speed(
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CANx,
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bus_config[bus_number].can_speed,
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can_loopback,
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(unsigned int)(can_silent) & (1U << can_number)
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);
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return ret;
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}
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void can_clear_send(CAN_TypeDef *CANx, uint8_t can_number) {
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can_health[can_number].can_core_reset_cnt += 1U;
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llcan_clear_send(CANx);
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}
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void update_can_health_pkt(uint8_t can_number, uint32_t ir_reg) {
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CAN_TypeDef *CANx = CANIF_FROM_CAN_NUM(can_number);
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uint32_t esr_reg = CANx->ESR;
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can_health[can_number].bus_off = ((esr_reg & CAN_ESR_BOFF) >> CAN_ESR_BOFF_Pos);
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can_health[can_number].bus_off_cnt += can_health[can_number].bus_off;
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can_health[can_number].error_warning = ((esr_reg & CAN_ESR_EWGF) >> CAN_ESR_EWGF_Pos);
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can_health[can_number].error_passive = ((esr_reg & CAN_ESR_EPVF) >> CAN_ESR_EPVF_Pos);
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can_health[can_number].last_error = ((esr_reg & CAN_ESR_LEC) >> CAN_ESR_LEC_Pos);
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if ((can_health[can_number].last_error != 0U) && (can_health[can_number].last_error != 7U)) {
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can_health[can_number].last_stored_error = can_health[can_number].last_error;
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}
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can_health[can_number].receive_error_cnt = ((esr_reg & CAN_ESR_REC) >> CAN_ESR_REC_Pos);
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can_health[can_number].transmit_error_cnt = ((esr_reg & CAN_ESR_TEC) >> CAN_ESR_TEC_Pos);
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can_health[can_number].irq0_call_rate = interrupts[can_irq_number[can_number][0]].call_rate;
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can_health[can_number].irq1_call_rate = interrupts[can_irq_number[can_number][1]].call_rate;
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can_health[can_number].irq2_call_rate = interrupts[can_irq_number[can_number][2]].call_rate;
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if (ir_reg != 0U) {
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can_health[can_number].total_error_cnt += 1U;
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// RX message lost due to FIFO overrun
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if ((CANx->RF0R & (CAN_RF0R_FOVR0)) != 0U) {
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can_health[can_number].total_rx_lost_cnt += 1U;
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CANx->RF0R &= ~(CAN_RF0R_FOVR0);
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}
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can_clear_send(CANx, can_number);
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}
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}
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// ***************************** CAN *****************************
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// CANx_SCE IRQ Handler
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static void can_sce(uint8_t can_number) {
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update_can_health_pkt(can_number, 1U);
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}
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// CANx_TX IRQ Handler
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void process_can(uint8_t can_number) {
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if (can_number != 0xffU) {
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ENTER_CRITICAL();
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CAN_TypeDef *CANx = CANIF_FROM_CAN_NUM(can_number);
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uint8_t bus_number = BUS_NUM_FROM_CAN_NUM(can_number);
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// check for empty mailbox
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CANPacket_t to_send;
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if ((CANx->TSR & (CAN_TSR_TERR0 | CAN_TSR_ALST0)) != 0U) { // last TX failed due to error arbitration lost
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can_health[can_number].total_tx_lost_cnt += 1U;
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CANx->TSR |= (CAN_TSR_TERR0 | CAN_TSR_ALST0);
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}
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if ((CANx->TSR & CAN_TSR_TME0) == CAN_TSR_TME0) {
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// add successfully transmitted message to my fifo
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if ((CANx->TSR & CAN_TSR_RQCP0) == CAN_TSR_RQCP0) {
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if ((CANx->TSR & CAN_TSR_TXOK0) == CAN_TSR_TXOK0) {
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CANPacket_t to_push;
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to_push.fd = 0U;
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to_push.returned = 1U;
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to_push.rejected = 0U;
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to_push.extended = (CANx->sTxMailBox[0].TIR >> 2) & 0x1U;
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to_push.addr = (to_push.extended != 0U) ? (CANx->sTxMailBox[0].TIR >> 3) : (CANx->sTxMailBox[0].TIR >> 21);
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to_push.data_len_code = CANx->sTxMailBox[0].TDTR & 0xFU;
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to_push.bus = bus_number;
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WORD_TO_BYTE_ARRAY(&to_push.data[0], CANx->sTxMailBox[0].TDLR);
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WORD_TO_BYTE_ARRAY(&to_push.data[4], CANx->sTxMailBox[0].TDHR);
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can_set_checksum(&to_push);
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rx_buffer_overflow += can_push(&can_rx_q, &to_push) ? 0U : 1U;
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}
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// clear interrupt
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// careful, this can also be cleared by requesting a transmission
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CANx->TSR |= CAN_TSR_RQCP0;
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}
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if (can_pop(can_queues[bus_number], &to_send)) {
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if (can_check_checksum(&to_send)) {
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can_health[can_number].total_tx_cnt += 1U;
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// only send if we have received a packet
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CANx->sTxMailBox[0].TIR = ((to_send.extended != 0U) ? (to_send.addr << 3) : (to_send.addr << 21)) | (to_send.extended << 2);
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CANx->sTxMailBox[0].TDTR = to_send.data_len_code;
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BYTE_ARRAY_TO_WORD(CANx->sTxMailBox[0].TDLR, &to_send.data[0]);
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BYTE_ARRAY_TO_WORD(CANx->sTxMailBox[0].TDHR, &to_send.data[4]);
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// Send request TXRQ
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CANx->sTxMailBox[0].TIR |= 0x1U;
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} else {
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can_health[can_number].total_tx_checksum_error_cnt += 1U;
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}
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refresh_can_tx_slots_available();
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}
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}
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EXIT_CRITICAL();
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}
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}
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// CANx_RX0 IRQ Handler
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// blink blue when we are receiving CAN messages
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void can_rx(uint8_t can_number) {
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CAN_TypeDef *CANx = CANIF_FROM_CAN_NUM(can_number);
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uint8_t bus_number = BUS_NUM_FROM_CAN_NUM(can_number);
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while ((CANx->RF0R & CAN_RF0R_FMP0) != 0U) {
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can_health[can_number].total_rx_cnt += 1U;
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// can is live
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pending_can_live = 1;
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// add to my fifo
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CANPacket_t to_push;
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to_push.fd = 0U;
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to_push.returned = 0U;
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to_push.rejected = 0U;
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to_push.extended = (CANx->sFIFOMailBox[0].RIR >> 2) & 0x1U;
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to_push.addr = (to_push.extended != 0U) ? (CANx->sFIFOMailBox[0].RIR >> 3) : (CANx->sFIFOMailBox[0].RIR >> 21);
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to_push.data_len_code = CANx->sFIFOMailBox[0].RDTR & 0xFU;
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to_push.bus = bus_number;
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WORD_TO_BYTE_ARRAY(&to_push.data[0], CANx->sFIFOMailBox[0].RDLR);
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WORD_TO_BYTE_ARRAY(&to_push.data[4], CANx->sFIFOMailBox[0].RDHR);
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can_set_checksum(&to_push);
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// forwarding (panda only)
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int bus_fwd_num = safety_fwd_hook(bus_number, to_push.addr);
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if (bus_fwd_num != -1) {
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CANPacket_t to_send;
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to_send.fd = 0U;
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to_send.returned = 0U;
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to_send.rejected = 0U;
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to_send.extended = to_push.extended; // TXRQ
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to_send.addr = to_push.addr;
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to_send.bus = to_push.bus;
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to_send.data_len_code = to_push.data_len_code;
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(void)memcpy(to_send.data, to_push.data, dlc_to_len[to_push.data_len_code]);
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can_set_checksum(&to_send);
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can_send(&to_send, bus_fwd_num, true);
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can_health[can_number].total_fwd_cnt += 1U;
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}
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safety_rx_invalid += safety_rx_hook(&to_push) ? 0U : 1U;
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ignition_can_hook(&to_push);
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led_set(LED_BLUE, true);
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rx_buffer_overflow += can_push(&can_rx_q, &to_push) ? 0U : 1U;
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// next
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CANx->RF0R |= CAN_RF0R_RFOM0;
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}
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}
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static void CAN1_TX_IRQ_Handler(void) { process_can(0); }
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static void CAN1_RX0_IRQ_Handler(void) { can_rx(0); }
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static void CAN1_SCE_IRQ_Handler(void) { can_sce(0); }
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static void CAN2_TX_IRQ_Handler(void) { process_can(1); }
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static void CAN2_RX0_IRQ_Handler(void) { can_rx(1); }
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static void CAN2_SCE_IRQ_Handler(void) { can_sce(1); }
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static void CAN3_TX_IRQ_Handler(void) { process_can(2); }
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static void CAN3_RX0_IRQ_Handler(void) { can_rx(2); }
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static void CAN3_SCE_IRQ_Handler(void) { can_sce(2); }
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bool can_init(uint8_t can_number) {
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bool ret = false;
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REGISTER_INTERRUPT(CAN1_TX_IRQn, CAN1_TX_IRQ_Handler, CAN_INTERRUPT_RATE, FAULT_INTERRUPT_RATE_CAN_1)
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REGISTER_INTERRUPT(CAN1_RX0_IRQn, CAN1_RX0_IRQ_Handler, CAN_INTERRUPT_RATE, FAULT_INTERRUPT_RATE_CAN_1)
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REGISTER_INTERRUPT(CAN1_SCE_IRQn, CAN1_SCE_IRQ_Handler, CAN_INTERRUPT_RATE, FAULT_INTERRUPT_RATE_CAN_1)
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REGISTER_INTERRUPT(CAN2_TX_IRQn, CAN2_TX_IRQ_Handler, CAN_INTERRUPT_RATE, FAULT_INTERRUPT_RATE_CAN_2)
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REGISTER_INTERRUPT(CAN2_RX0_IRQn, CAN2_RX0_IRQ_Handler, CAN_INTERRUPT_RATE, FAULT_INTERRUPT_RATE_CAN_2)
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REGISTER_INTERRUPT(CAN2_SCE_IRQn, CAN2_SCE_IRQ_Handler, CAN_INTERRUPT_RATE, FAULT_INTERRUPT_RATE_CAN_2)
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REGISTER_INTERRUPT(CAN3_TX_IRQn, CAN3_TX_IRQ_Handler, CAN_INTERRUPT_RATE, FAULT_INTERRUPT_RATE_CAN_3)
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REGISTER_INTERRUPT(CAN3_RX0_IRQn, CAN3_RX0_IRQ_Handler, CAN_INTERRUPT_RATE, FAULT_INTERRUPT_RATE_CAN_3)
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REGISTER_INTERRUPT(CAN3_SCE_IRQn, CAN3_SCE_IRQ_Handler, CAN_INTERRUPT_RATE, FAULT_INTERRUPT_RATE_CAN_3)
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if (can_number != 0xffU) {
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CAN_TypeDef *CANx = CANIF_FROM_CAN_NUM(can_number);
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ret &= can_set_speed(can_number);
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ret &= llcan_init(CANx);
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// in case there are queued up messages
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process_can(can_number);
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}
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return ret;
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}
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