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119 lines
3.0 KiB
119 lines
3.0 KiB
void TIM5_IRQ_Handler(void);
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void setup_timer5(void) {
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// register interrupt
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REGISTER_INTERRUPT(TIM5_IRQn, TIM5_IRQ_Handler, 1050000U, FAULT_INTERRUPT_RATE_KLINE_INIT)
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// setup
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register_set(&(TIM5->PSC), (48-1), 0xFFFFU); // Tick on 1 us
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register_set(&(TIM5->CR1), TIM_CR1_CEN, 0x3FU); // Enable
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register_set(&(TIM5->ARR), (5000-1), 0xFFFFFFFFU); // Reset every 5 ms
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// in case it's disabled
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NVIC_EnableIRQ(TIM5_IRQn);
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// run the interrupt
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register_set(&(TIM5->DIER), TIM_DIER_UIE, 0x5F5FU); // Update interrupt
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TIM5->SR = 0;
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}
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bool k_init = false;
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bool l_init = false;
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void setup_kline(bool bitbang) {
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if (bitbang) {
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if (k_init) {
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set_gpio_output(GPIOC, 12, true);
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}
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if (l_init) {
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set_gpio_output(GPIOC, 10, true);
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}
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} else {
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if (k_init) {
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set_gpio_mode(GPIOC, 12, MODE_ALTERNATE);
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}
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if (l_init) {
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set_gpio_mode(GPIOC, 10, MODE_ALTERNATE);
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}
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}
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}
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void set_bitbanged_kline(bool marking) {
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// tickle needs to be super fast (so logic level doesn't change)
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ENTER_CRITICAL();
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if (k_init) {
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register_set_bits(&(GPIOC->ODR), (1U << 12));
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if (!marking) {
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register_clear_bits(&(GPIOC->ODR), (1U << 12));
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}
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}
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if (l_init) {
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register_set_bits(&(GPIOC->ODR), (1U << 10));
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if (!marking) {
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register_clear_bits(&(GPIOC->ODR), (1U << 10));
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}
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}
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EXIT_CRITICAL();
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// blink blue LED each time line is pulled low
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current_board->set_led(LED_BLUE, marking);
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}
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uint16_t kline_data = 0;
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uint16_t kline_data_len = 0;
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uint16_t kline_bit_count = 0;
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uint16_t kline_tick_count = 0;
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uint16_t kline_ticks_per_bit = 0;
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void TIM5_IRQ_Handler(void) {
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if ((TIM5->SR & TIM_SR_UIF) && (kline_data != 0U)) {
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if (kline_bit_count < kline_data_len) {
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bool marking = (kline_data & (1U << kline_bit_count)) != 0U;
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set_bitbanged_kline(marking);
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} else {
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register_clear_bits(&(TIM5->DIER), TIM_DIER_UIE); // No update interrupt
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register_set(&(TIM5->CR1), 0U, 0x3FU); // Disable timer
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setup_kline(false);
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kline_data = 0U;
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USB_WritePacket(NULL, 0, 0); // required call (so send nothing)
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USBx_OUTEP(0)->DOEPCTL |= USB_OTG_DOEPCTL_CNAK;
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}
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kline_tick_count++;
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if ((kline_tick_count % kline_ticks_per_bit) == 0U) {
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kline_bit_count++;
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}
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}
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TIM5->SR = 0;
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}
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bool bitbang_five_baud_addr(bool k, bool l, uint8_t addr) {
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bool result = false;
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if (kline_data == 0U) {
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k_init = k;
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l_init = l;
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kline_data = (addr << 1) + 0x200U; // add start/stop bits
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kline_data_len = 10U;
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kline_bit_count = 0;
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kline_tick_count = 0;
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kline_ticks_per_bit = 40U; // 200ms == 5bps
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setup_kline(true);
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setup_timer5();
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result = true;
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}
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return result;
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}
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bool bitbang_wakeup(bool k, bool l) {
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bool result = false;
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if (kline_data == 0U) {
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k_init = k;
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l_init = l;
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kline_data = 2U; // low then high
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kline_data_len = 2U;
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kline_bit_count = 0;
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kline_tick_count = 0;
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kline_ticks_per_bit = 5U; // 25ms == 40bps
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setup_kline(true);
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setup_timer5();
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result = true;
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}
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return result;
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}
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